|
Because the popularity of the portable equipments, power
gets more attention than ever before, and becomes an important
issue in addition to area and speed considerations in VLSI
design. In this
thesis, powering optimization technique, a.k.a. voltage scaling
technique, is considered. As we know that power consumption is
proportional to the square of the supplied voltage, then voltage
scaling could get larger power reduction ratio with respect to
other techniques. However, the voltage scaling technique has
some problems that need to be overcome. First, mixed voltage
sources will cause difficulties in circuit layout, and make
routing overheads grow rapidly. Second, there are level
converters needed to be inserted between low-voltage cells and
high-voltage cells. Because level converters also consume power,
reducing the number of level converters becomes an important
issue. Finally, it is a critical problem to determine which
cells in a circuit are selected to be replaced with low-voltage
cells. Our path-oriented
clustered voltage scaling technique solves the problems
described above and add another 22% power reduction ratio over
that of the original clustered voltage scaling technique.
|