臺灣博碩士論文加值系統

在非同步傳輸模式網路中, 為了保護網路及終端系統免於壅塞的威脅以及
增加網路資源的使用效率, ATM Forum 制定一種名為ABR流量控制的網路
交通管理策略. ABR流量控制使用資源管理細胞來實現閉迴路壅塞控制.
本質上, 它是屬於一種反應控制機制, 對於每一條ABR連線, 它的細胞傳
輸容許速率能夠依據網路上的壅塞狀況來動態調整.本論文描述我所設計
與製作的兩顆支援ABR服務的ATM/SAR晶片. 設計與驗證的步驟是使用
CADENCE與ACTEL戥等電腦輔助設計軟體來達成, 兩顆ACTEL FPGAs 用來實
現此設計晶片. 這兩顆晶片配合ABR控制器使用在ATM網路介面卡上, 藉以
提供ABR 流量控制能力.

In ATM networks, to protect the network and the end-system from
congestion and to promote the efficient use of network
resources, a traffic management strategy named Available Bit
Rate (ABR) flow control is specified by the ATM Forum. ABR flow
control utilizes Resource Management (RM) cells to implement a
closed-loop congestion control scheme, which is essentially a
reactive control mechanism that dynamically regulates the
allowed cell transmission rate of each ABR connection using
feedback information from the network. This thesis presents my
work on the design and implementation of two chips for
supporting the ABR service. All the design and and verification
for the chips are accomplished by CADENCE and ACTEL computer-
aided-design (CAD) tools and inplemented in two ACTEL FPGAs.
These two chips along with a ABR controller chip are used in an
ATM adaptor card to provide the ABR flow control capability.