臺灣博碩士論文加值系統

　　現在在市面上有越來越多的多媒體應用程式，比如說視訊隨選，視訊會議，虛擬實境3D，遊戲等等。在以前這些應用程式都是由專用硬體支援滿足效能需求。為了使這些應用程式能在一般的處器理有效的處理，我們設計和Intel MMX相容的多媒體指令和資料型態。然後在一般的處理器內加入執行多媒體指令的多媒體運算單元。
　　在這一篇論文中，我們探討在多媒體運算單元中ALU，乘法器和shifter的設計。這些處理單元使用SIMD（單一指令多重資料）技術，許多多媒體資料可被平行處理，因而大幅增加多媒體應用程式的效能。
　　ALU對packed資料執行算數和邏輯的運算。算數運算包括saturation和wrap around modes的加法與減法，比較運算，執行平均運算的PAVGW，以及執行對差值取絕對值運算的PDISTW。乘法單元對packed資料做乘法運算以及乘加的運算。shifter單元對packed資料做邏輯和算數移位運算。
　　在ALU中最重要的單元是加法器，其所採用的技術是CCS (conditional carry selection)，並且利用的平行處理特性。因此將傳統的加法器架構改變成SIMD的加法器。除此之外，saturation and wrap around, comparison, average.和absolution次單元也加入ALU中。
　　乘法器也是一個SIMD的運算單元。這運算單元採用Wallace tree來設計16乘16的乘法器並加入一個4 - 2的加法器在兩個16乘16的乘法器的中間來達成累加。除此之外，有一加法器把兩個從Wallace tree輸出的運算元相加，也是採用CSS的技術。結果乘法器分成兩個階段管線方式來完成，而這一電路的效能包括電路面積和時間都比乘法器再加上一加法器來做累加還要好。
　　Shifter是一個barrel shifter。因為傳統shifter不是SIMD shifter，所以加入多工器使傳統的shifter有能力處理不同的資料型態。
　　在發展MFU的過程中，我們使用0.6μm的cell library。從synthesis和simulation結果，MFU的確大大增加多媒體運用程式的效能，且運算單元的電路面積幾乎和傳統的非SIMD處理器之面積一樣。除此之外，這此運算單元的最大delay皆小於10ns，所以最大的clock rate為大於100MHz。最後，所有的多媒體應用程式都可因這神奇的MFU而加速。

　　Nowadays, there are more and more multimedia applications in the market, such as video - on - demand, video conference, virtual reality, and 3D games, etc. However, almost these multimedia applications are supported by dedicated hardware. In order that these applications can be processed by the general purpose microprocessor efficiently, we design multimedia instructions and data types which are compatible with Intel MMX. Moreover, we design a multimedia functional unit responsible for executing these multimedia instructions in the general purpose microprocessor.
　　In this thesis, we present the design of ALU, multiplier, and shifter, and shifter of the multimedia functional unit. These units adopt the SIMD technique (Single Instruction Multiple Data), which makes many multimedia data be processed in parallel to significantly increase the performance of multimedia applications.
　　The ALU executes arithmetic and logic operations. Te arithmetic operations include packed addition and subtraction with optional saturation, comparison of two operands, and two instructions PAVGW and PDISTW which perform the average of operands and executes the absolute differences respectively. The multiplier unit performs packed multiplication and packed multiply - add operations. The shifter unit performs logical left, right, and arithmetic right shift of packed operands.
　　Because the requirements and operations of these functional units are different from those of conventional functional units, we propose some novel methods to improve conventinal designs. The adder in ALU is realized with the Conditional Carry Selection (CCS) approach. Moreover, the architecture of conventional CSS adder is modified to become a SIMD adder. Besides, the saturation and wrap around, comparison, average, and absolution subunits are also added into the ALU.
　　The multiplier is also a SIMD functional unit. Wallace tree is adopted to design the 16 ×16 multiplier and an additional 4 - 2 adder lies between two 16 ×16 multipliers to perform the task of accumulation to realize the multiply - add instruction. Besides, the adder which performs the addition of two operands from the Wallace tree is designed by adopting the technique of CSS, too. As a result, the multiplier is organized into a two - stage balance pipeline whose performance and area are better than a conventional multiplier with an adder for accumulation.
　　The shifter is a barrel shifter. Because conventional shifter is not suitable for SIMD operation, adding multiplexers to the conventional shifter makes it have capability to shift operands of different data types.
　　In the process of developing MFU, 0.6μm cell library is used. From the synthesized and simulation result. MFU indeed greatly increases the performance of multimedia applications, while the circuit area of the developed functional units is almost the same as the conventional functional units without SIMD structure. In addition, since the maximum delay among these functional units is smaller than 10 ns, the maximum clock rate of MFU is higher than 100MHz. Eventually, all multimedia applications will speed by this novel MFU.