IC封裝過程中所產生之金線偏移(Wire Sweep)現象是造成IC產品品質不良的重要因素之一。當封裝產品產生金線偏移時，不僅會使金線間容易產生接觸而形成短路，也有可能將金線扯斷，而形成斷路；特別是今時IC製品越趨輕巧，對此一金線偏移之研究更有其重要性。本文主要對封裝過程中之金線偏移現象建構一套實驗設備及方法來量測流體在實驗過程中，其流速及黏度對金線偏移量的影響，並與理論值做比較，企圖求得較佳之理論模式。

Wire sweep is a critical process defect in the era of miniaturization of IC. This is because with wire sweep wires may contact each other or even be broken and become short circuit. Unfortunately, the physical nature of wire sweep is still not very clear.
This paper presents theoretical works on results and wire sweep. With this analysis, both flow induced loads on the wires and models to predict the amount of wire sweep for different viscosity and velocity of fluid are found.