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Semiconductor industry is one of the booming industries in
Taiwan in these two decades. Wafer fabrication owns the most
complicated process in semiconductor manufacturing. The
photolithography area is in practice treated as the control
center of wafer flows. Developing a comprehensive dispatching
rule for this area to improve its performance as well as the
performance of the entire fab is important. This study first
investigates all factors which affect the system performance as
well as the corresponding dispatching algorithm in
photolithography area. DPPA (Dispatching Procedure for
Photolithography Area) is then developed with the consideration
of preventative maintenance, hot lot, queue time limit,
restriction of mask, WIP control, and due date control. Method,
MIVS and RTR, to enhance line balance and on-time delivery are
also employed in DPPA. A release policy corresponding to the
proposed dispatching procedure is also designed. A fab
simulation model written in C and real world fab data are
employed to experiment the effectiveness of DPPA. Five
conventional dispatching rules, FIFO, SPT, SRPT, EDD and CR, are
used to be compared with. Results demonstrate that DPPA shows
superiority on the performance measures of on-time delivery,
mean tardiness, linear output, WIP distribution, mean cycle time
and queue time, standard deviation of cycle time, number of
reworks, and total WIP. Results also conclude that comparing
with other conventional dispatching rules, DPPA yields shorter
cycle time and lower WIP level while resulting in an equal
throughput level. Keyword : wafer fabrication, photolithography
area, dispatching rule, on-time delivery, line balance.
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