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This thesis focuses on the design of bandpass delta sigma
modulator. A design flow of the delta sigma modulator is
introduced. Some researches show that the transfer function
has effects on the modulator performance. We present the
effects by MATLAB simulation. The two-bit fourth-order bandpass
delta sigma modulator is first simulated by SWITCAP2 and
completes its design by HSPICE simulation. A new bandpass
modulator based on the two-delay loop resonator is designed.
The two-delay loop resonator is implemented by time-
multiplexed integrators. Half of numbers of OP amps, ratio
independent in-phase and quadrature branches are achieved in our
modulator.For a two-bits quantizer and a two-bit feedback DAC,
some other problems appear. The errors of the DAC level has
tremendous degradation on the modulator, and effects of the DAC
errors are simulated by SWITCAP2 simulator. To eliminate effects
of the DAC errors, some approaches are introduced, and
individual level averaging approach is chosen. A DAC with
individual level averaging is proposed. The improvement of SNR
by applying individual level averaging approach is also shown
by SWITCAP2 simulator. Simulations of the two-bit fourth-order
bandpass delta sigma modulator complete with the HSPICE
simulation. The design ends by implementing the modulator in a
single chip to be fabricated.
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