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研究生:葉定修
研究生(外文):Ye, Ding-Xiu
論文名稱:高速、低電壓與具濾波功能限幅放器與強度指示器之積體電路之研製
論文名稱(外文):Chip Implementation of High Speed Low Voltage Limiting-Filtering Amplifier and Received Singal Strengh Indicator Circuits
指導教授:李揚漢李揚漢引用關係
指導教授(外文):Lee, Yang-Han
學位類別:碩士
校院名稱:淡江大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1997
畢業學年度:85
語文別:中文
論文頁數:89
中文關鍵詞:濾波功能強度指示器
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低電壓中頻限幅放大器與強度指示器廣泛的運用在FM調
變通訊系統中,主要的功能是將訊號加以放大與限幅並將訊號
的強度指示出來。但市售的產品大都以BJT製程比較多,為配
合國內CMOS製程,因而研製CMOS低電壓中頻限幅放大器與強度
指示器之晶片,本電路採用基本差動放大電路與精準全波整流
電路並有實際的測試結果。為進一步提升限幅放大器使用頻
帶,因而研究高速低電壓限幅放大器,在本論文共提出三個電
路。電路一採用基本差動放大電路再加入輸出級與偏移電壓補
償電路。但因基本差動放大電路在更高速的頻帶無法工作,所
以電路二採用共源共基型差動放大電路的架構,以便提升整個
系統的使用頻率。電路三乃對限幅放大器的級數與頻率之間的
關係做進一步的探討。但具有濾波的功能的高速限幅放大器,
將可大大提升電路的實用價值。在具濾波功能限幅放大器的章
節中,本論文中共提出三個電路並加以比較,以便取出最適合
積體化的電路。
本論文中共有實際的晶片四顆,分別採用臺灣積體電路製
作公司0.8微米製程與0.6微米製程與聯華積體電路製作公司
0.8微米製程與0.5微米製程等四種製程。其中低電壓中頻限幅
放大器與強度指示器的晶片功能正常其餘三顆為部份功能正
常。低電壓中限幅放大器與強度指示器實際測試結果如下,限
幅放大器的最小輸入為15mV,總增益為60dB,功率消耗為3mW。
強度指示器的指示範圍為,輸入訊號15mv到500mv,功率消耗為
2mW,整顆晶片消耗總功率為5mW。


The low voltage IF (intermediate-frequency) limiting amplifier and received signal strenght indicator (RSSI) are widely used the FM modulation in communication systems. The main functions are amplification and limitation signal and measuring received signal strength. There are several IC's products realizing limiting amplifier and RSSI in bipolar technologies. Here we want to implement the low voltage IF limiting amplifier and received signal strength with CMOS technology. The differential amplifier and full wave rectifier circuit were adopted in this circuit. We have shown the results by the experiment. We provide three circuits of the high speed low voltage limiting amplifier, in order to improve the bandwidth. The first circuit is composed of the basic differential amplifier circuit, output stage, and voltage compensation circuit. In the second circuit, we utilize CSCG differential amplifier to improve the operation frequency. The relationship between, the frequency and the numbers of stages in limiting amplifier were discussed. Although the bandwidth of the high speed limiting amplifier is enough, the limiting amplifier just only amplifies the signal that system needed in actual usage. The actual usage of circuit will he improved, if the limiting amplifier needs the function of filter. We compare the performance of three circuits in the chapter 5 for limiting-filtering amplifier and try to implement them in a IC in the future.
We have implemented four chips in this paper, each of them was implemented by TSMC 0.8um process, TSMC 0.6 process, UMC 0.8um process, and UMC 0.5 process. The chip of low voltage IF limiting amplifier and RSSI are in good working, others are partial working. The experiment results of the IF limiting amplifier are as follows: the smallest input signal is 15mv, total gain is 60dB, power dissipation is 3mw. The experiment results of RSSI are as follows: the range of the input signal is 15mv to 500mv, the power dissipation is 2mw and the total power dissipation of the chip is 5 mw.

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