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For HDTV system, the phase tracking loop is an
additionaldecision feedback loop which further tracks out phase
noise which has notbeen removed by the IF PLL. In this thesis,
the general design andapproximation method of phase tracking
loop are described.Furthermore, we discuss several architectures
for high-speed operation.Finally, two phase tracking loop
circuits of GA HDTV which have theproperties─computationally
efficient, hierarchy, modularity, and localityare designed and
realized. We use the COMPASS 0.6mm standard celllibrary and
TSMC 0.6um SPDM technology to design by CADENCEtools. The
highest frequency of chip is 70.97 MHz and operating on the70.97
Msymbol/sec.
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