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Design and Implementation of a VLSI Real-
Time ECG Adaptive Sampling Chip. Wu-Luan Lin* Shen-Chuan Tai**
Department of Electrical Engineering National Cheng Kung
University, Tainan, Taiwan, R.O.C. ABSTRACT Due to
the amount of Multi-channel ECG is great, one of the important
subjectsof medical engineering is to reduce the amount of data
and maintaintheir quality of diagnosis at the same time. ECG
data compression providesthe abilities to reduce the required
storage for storing data and reduce the bandwidth for
transferring in the channel. Most of the 24-hour Holter
monitoring system instruments used in our country are imported.
The critical component among these instruments is the ECG
compression chip. But the development of this kind of chip is
not yet availablein our country. In this Thesis, we adopt a new
sampling scheme which isa patient by professor Tai., to develop
a chip with integral system by usingcell-based IC design. Using
the cell library of Compass and 0.6um technologyof TSMC, the
design of chip with 3515*3505 um2 die size, 10MHz of max
clockrate, and 142k of max ECG sample rate have finished. At the
same time, the design has passed the NSC's screening committee
of forward-lookingchip examination. Thus, it will be fabricated
by TSMC. *The Author ** The Advisor
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