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In this thesis, the vertical strip noise problem of IRCCD camera is analyzed based on the hypothesis that large resistance of polysilicon interconnections which result in large . R-C time delay is the cause of the unevenness in the video outpurts. Thermal response of our IRCCD camera was carefully tested and compared to theoretical values, along with the relation of differences between pixels at different scene temperatures. Video outputs are measured at different transfer gate voltages and at fixed scene temperature. With the relation between output signal magnitudes and transfer gate voltages, R-C time constants formed by polysilicon interconnections and capacitance of CCDs can be calculated and compared to layout extracted values. In this step, we found that the time required for the signal electrons to be read out of PtSi detectors may be far shorter than the clock period we used. The time required for read out is calculated form theoretical model,and is indeed far shorter than the clock period we used.
From the results of Medici simulation it is found that tranfer gate voltage differences as small as 0.3mV could cause the observed unevenness in the output signals, and the uniformity of video outputs can be regained through proper adjusts of concentrations of n+ bridges. At fixed transfer gate bias, an order of difference in the concentration of n+ bridge will result in signal difference comparable to that we observed.
Further investigation of R-C ladder structures exist in IRCCD chip with Hspice shown that large R-C time constants will result in overshoots in transfer gate voltages at pixels connected by polysilicon intercnnections, which in turn result in the vertical strip problem. This problem can be relieved by the use of metal interconnections, proper adjust of n+ bridge concentrations,and elimination of spikes in clock patterns.
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