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This thesis is related to the design of a distributedparallel processor for computing the dynamic space warping algorithm. The research topics involved include the application of dynamic space warping VLSI chip, OOP(Object OrientedProgramming)-based system design technology, distributed parallel processing and FPGA-based fast prototypingdesign technology. Currently, a single-node dynamic space warping processor has been implemented, tested, and evaluated. Also, based on such a processor, a distributed parallel processing system has been developedon Ethernet by using Client/Server architecture. The whole system is tested remotely in order to provide a complete computing environment for the applicationsof digital image recognition.
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