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研究生:曾德彰
研究生(外文):Der-Jang Tseng
論文名稱:P型快閃記憶體特性分析之研究
論文名稱(外文):A Study of Characterization and Analysis in P-Channel Flash Memory Devices
指導教授:陳勝利陳勝利引用關係
指導教授(外文):Shen-Li Chen
學位類別:碩士
校院名稱:大葉大學
系所名稱:電機工程研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1999
畢業學年度:87
語文別:中文
論文頁數:94
中文關鍵詞:快閃記憶體P通道寫入抹除臨限電壓F-N穿隧撞擊游離化
外文關鍵詞:Flash MemoryP-channelprogramerasethreshold voltageF-N tunnelingimpact ionization
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摘 要
近年來快閃記憶體(flash memory)是非揮發性記憶體IC中逐漸取代其他同類產品的明日之星,非常值得去探討它的特性,因此有非常多關於元件特性方面的研究。對於這些快閃記憶體的特性探討無非都是針對寫入(write)、抹除(erase)時臨限電壓改變(threshold voltage shift)的速度、資料耐久性(data endurance)、資料保存時間(retention time)的長久、資料的寫入效率及抹除速度等方面,希望能夠提高可靠度以及元件速度、集積度等等。
傳統非揮發性記憶體有資料儲存之功能,而資料之儲存寫入方式大都採用F-N穿隧或通道熱電子寫入其浮動閘。因此,關於這方面的研究大都專注於N通道快閃記憶體,原因是由於方便採用正閘極電壓寫入操作。相對的,在P通道快閃記憶體方面的特性以及其他方面的研究往往很少。若能適切地預測出浮動閘上的電荷改變量,則我們便能知道其臨限電壓之變化,進而判別資料的儲存與否。所以在本論文,我們特別針對P通道快閃記憶體在寫入及抹除的過程中,其臨限電壓相對於時間之改變量做深入的探討與研究,同時與N通道快閃記憶體加以比較。在此我們也使用一個能精確預測寫入電荷量的模型,此模型稱為通道熱電洞產生熱電子電流模型(Channel-Hot-Hole-Induced-Hot-Electron Current Model);另外在抹除操作上,則是採用通用的福勒-諾德漢電子穿隧模型(Fowler-Nordheim Electron Tunneling Model)。

Abstract
The flash memory is a better choice than others in the nonvolatile memory market, therefore, it will be much valuable for us to investigate its characteristics, and there are lots of researches about it. Recently, the research of flash memory, the focus is always concentrated on the threshold voltage shift due to programming or erasing operation, data retention time, data endurance, programming efficiency, erasing speed, and so on. This benifits higher device reliability, speed, and integrity.
The nonvolatile memory devices have the capability to store the informations. The most used programming method is F-N tunneling scheme or channel-hot-electron(CHE) scheme overcoming the floating gate barrier. It is very convenient for N-channel flash memory to program by positive gate bias. So that P-channel flash memory is less attracted to researchers. The data storage is mainly determined by the charges on the floating gate. Such that if the change of charge on the floating gate can be accurate to predict, then the shifting of devices threshold voltage and the data storage or not can be discriminated.
Therefore in this thesis, we will investigate the threshold voltage alteration during the programming and erasing operation of the submicron P-channel flash memory. And, a comparison in both types is also maded. In this submicronmeter P-channel flash memory devices, the programming model, which is called Channel-Hot-Hole-Induced-Hot-Electron Current Model, to simulate the charge injection in the flash memory is used. For erasing operation, a well-known model, Fowler-Nordheim Electron Tunneling Model, will be used during theoretical simulation.

目 錄
封面內頁
簽名頁
授權書………………………………………………………iii
中文摘要……………………………………………………v
英文摘要…………………………………………………vi
誌謝………………………………………………………viii
目錄……………………………………………………………ix圖目錄………………………………………………………xi
表目錄………………………………………………………xii
第一章 緒論………………………………………………1
第二章 注入模型的建立………………………5
2.1 元件操作模式
2.2 幸運熱電子注入模型
2.3 撞擊游離化模型
2.4 福勒-諾德漢電子穿隧模型
第三章 可靠性與載子效應………………………………18
3.1 可靠性問題對快閃記憶體特性的影響
3.2 閘極擾動(Gate Disturb)可靠性的影響
3.3 汲極擾動(Drain Disturb)可靠性的影響
3.4 讀取擾動(Read Disturb)可靠性的影響
3.5 過度抹除(Overerase)可靠性的影響
3.6 耐久度(Endurance)可靠性的影響
第四章 元件製程與量測………………………………28
4.1 快閃記憶體元件製作
4.2 量測過程
4.3 寫入與抹除
4.4 臨限電壓的量測
第五章 量測結果與討論…………………………………38
5.1 量測結果分析
5.2 寫入效率模擬
5.3 臨限電壓量測結果
5.4 結果討論
第六章 結論………………………………………………46
參考文獻……………………………………………………47
附錄

參 考 文 獻
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TMA user menual, 1997

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