在此論文中，我們主要研究雙極性電晶體的模型化技術。首先，我們討論Gummel-Poon 模型的理論及模型公式。然後，在模型參數萃取之前，我們必須應用校正及de-embedding技術來除去量測系統與原始元件間的非理想效應與寄生元件。而由於模型參數間息息相關，我們儘可能地藉由一連串不同的偏壓組態來分離某些參數。接著，我們以Gummel-Poon 模型理論為基礎，針對參數萃取和最佳化提出適當的順序來進行雙極性電體的模型化，以降低模型公式間的相互干擾。由最後的模擬結果和量測資料的比較顯示，在直流特性及S參數方面都十分吻合。因此，我們可以推斷先前建議的順序很適合用來做雙極性電晶體的模型化工作。其後，我們運用一種雜訊de-embedding的技術，來除去金屬墊(pads)所造成的雜訊影響。最後，以Gummel-Poon模型為基礎，我們完成了操作頻率為2.4GHz的低雜訊放大器設計。

The main study of this thesis is focused on the modeling of high frequency bipolar junction transistor. At first, we discussed the basic theory and formulation of the Gummel-Poon model. The calibration and de-embedding techniques are used to eliminate the non-ideal effects and parasitic components between the measurement system and the intrinsic device before modeling. We do our best to separate some parameters by a series of different bias configuration because the model parameters are very interdependent. Based on Gummel-Poon model, we recommend the sequences of parameters extraction and optimization for BJT modeling. The simulation results match well with the measured data in both DC and S-parameter. We can conclude that the recommended procedures are very appropriate for BJT modeling. A noise de-embedding techniques is also introduced and used to remove the contribution of pad parasitics on noise performance. Finally, a 2.4 GHz LNA is designed based on the Gummel-Poon model.

Abstract (English) iii
Abstract (Chinese) iv
Table Captions v
Figure Captions vi
Chapter 1 Introduction 1
1.1 Background 1
1.2 Organization 2
Chapter 2 Basic Theory of Silicon BJT Modeling 4
2.1 Introduction 4
2.2 Calibration and De-embedding 5
2.2.1 Calibration 5
2.2.2 De-embedding 6
2.3 Basic Theory and Formulas of the Gummel-Poon Model 7
2.4 Summary 13
Chapter 3 Parameters Extraction and Simulation Results of
BJT 23
3.1 Introduction 23
3.2 Parameters Extraction and Optimization of BJT 24
3.2.1 DC Modeling 24
3.2.1.1 Extraction - VAF, VAR 24
3.2.1.2 Extraction - IS, NF, BF, ISE, NE, IKF 25
3.2.1.3 Extraction -NR, BR, ISC, NC, IKR 26
3.2.2 Parasitic Resistance Modeling 26
3.2.2.1 Extraction - RE 27
3.2.2.2 Extraction - RC 27
3.2.2.3 Extraction - Rbb (RB, IRB, and RBM) 28
3.2.3 CV Modeling 28
3.2.3.1 Extraction - CJE, VJE, MJE 29
3.2.3.2 Extraction - CJC, VJC, MJC 29
3.2.4 AC Small-Signal Modeling 30
3.2.4.1 Extraction - TF, VTF, ITF, XTF 30
3.2.4.2 Extraction - PTF 31
3.2.4.3 Extraction - FC, XCJC 31
3.2.5 Sequences of Parameter Extraction and Optimization 32
3.3 Simulation results and Discussions on BJT Modeling 35
3.4 Summary 36
Chapter 4 Noise De-embedding and its Application to Low
Noise Amplifier Design 57
4.1 Introduction 57
4.2 Noise De-embedding for High Frequency Noise
Performance 57
4.3 Design of Low Noise Amplifier 61
4.4 Summary 63
Chapter 5 Conclusions 73
5.1 Conclusions 73
5.2 The Future Works 74
References 76

[1] ICCAP User's Manual, Hewlett-Packard Company, Semiconductor Systems Center.
[2] Advanced Bipolar Transistor Modeling Techniques, Hewlett Packard Application Note, pp. 1201-1204, July 1991.
[3] Giuseppe Massobrio and Paolo Antognetti,"Semiconductor Device Modeling with SPICE", Willy, 1993.
[4] The Fifth Symposium on Nano Device Technology, Short Course B: High Frequency Device/Circuit Characterization and Modeling, May, 1998.
[5] Alan D. Hart, "High Frequency Bipolar Transistor Device Modeling", Hewlett Packard Circuit Modeling Seminar, February 1992.
[6] David Q. Xu and, G. R. Branner, "High Frequency Bipolar Junction Transistor Modeling", Proceedings of the 40th Midwest Symposium on Circuits and Systems, Vol. 1, pp. 585-587.
[7] P. J. van Wijnen et al., "A New Straightforward Calibration and Correction Porcodure for 'on wafer' High Frequency S-parameter Measurements (45MHz-18GHz)", in IEEE BCTM Proceeding, 1987, pp. 70-73.
[8] J. Weng, "Error Correction in High-Frequency On-Wafer Measurements", Proc. IEEE 1994 Int. Conference on Microelectronic Test Structures, Vol. 7, pp. 164-167, March 1994.
[9] Sean C. Kelly, Edel C. Griffith, James A. Power and Mike O'Neill, "Prediction of AC Performance of Double-Polysilicon Bipolar Transistors from E-Test Parameters : An Experiment", Proc. IEEE 1998 Int. Conference on Microelectronic Test Structures, Vol. 11, pp. 147-152, March 1998.
[10] Fredrik Ingvarson and Kjell O. Jeppson, "A New Direct Extraction Algorithm for Intrinsic Gummel-Poon BJT Model Parameters", Proc. IEEE 1998 Int. Conference on Microelectronic Test Structures, Vol. 11, pp. 159-164, March 1998.
[11] J.W. Breti, J.D. Kendall and L. Nathawad, "Direct Extraction of SPICE Gummel-Poon Parameters for High Frequency Modeling", Proc. IEEE 1998 Int. Conference on Microelectronic Test Structure, Vol. 11, pp. 83-88, March 1998.
[12] P.J van Wijnen and L.C. Smith, "High Frequency Characterization of Small Geometry Bipolar Transistors", Proc. IEEE 1988 Bipolar Circuits and Technology Meeting, pp. 91-94.
[13] William R. Eisenstadt, "High-Frequency Characterization and Modeling of Polysilicon and Diffusion Lines", IEEE 1991 Custom Integrated Circuits Conference, 23.5.1-23.5.4.
[14] H Hillbrand and P. H. Russer, "An Efficient Method for Computer Aided Noise Analysis of linear Amplifier Networks", IEEE Trans. On Circuits and Systems, vol. CAS-23, pp. 235-238, no. 4 April 1976.
[15] Samuel Martin, Vance D. Archer III, David M. Boulin, Michel R. Frei, Kwok K. Ng and Ran-Hong Yan, "Device Noise in Silicon RF Technology", Bell Labs Technical Journal, Summer 1997.
[16] C.H. Chen and M.J. Deen, "High Frequency Noise of MOSFETs Modeling", Solid State Electronics vol. 42, No. 11, pp. 2069-2081, 1998.
[17] Jakub J. Kucera and Urs Lott, "Low-Power Silicon BJT LNA for 1.9 GHz", IEEE Microwave and Guided Wave Letters, vol. 8, No. 3, pp.136-137, March 1998.
[18] Jenshan Lin, Joseph S. Weiner, Huan-Shang Tsai, George Georgiou, Young-Kai Chen, King L. Tgai, Maureen Y. Lau and Dean P. Kossives, "Silicon Low noise Amplifier Chips for Multi-Chip Module Integration on A Silicon-Based Substrate", pp. 121-124, 1997 IEEE Radio Frequency Integrated Circuits Symposium.
[19] Ryuichi Fujimoto, Shoji Otaka, Hiroshi Iwai and Hiroshi Tanimoto, "A 1.5 GHz CMOS Low Noise Amplifier", IEICE Trans. Fundamentals, vol. E81-A, No.3, pp. 382-387, March 1998.
[20] Nikolay Tchamov and Petri Jarske, ? dB/3 GHz LNA on 0.8
μm BiCMOS with 8mW/2V", ICECS, pp. 623-626, 1996.
[21] Noriharu Suematsu, Masayoshi Ono, Shunji Kubo, Hisayasu Sato, Yoshitada Iyama and Osami Ishida, "L-band Internally Matched Si-MMIC Low Noise Amplifier", 1996 IEEE MTT'S Digest, pp. 1225-1227.