臺灣博碩士論文加值系統

SWAP (Shared Wireless Access Protocol) 是一個可以同時支援無線聲音與無線資料傳輸的協定，適用於半徑五十公尺內的範圍。使用SWAP技術，可以整合許多不同的消費性電子產品。若結合個人電腦的有線串列協定如USB (Universal Serial Bus) 、IEEE 1394，以及家電自動化的技術，將可使得發展各式應用的領域更廣泛。
本篇論文將介紹SWAP規格，提出支援SWAP規格的封包格式，並針對此一規格提出媒體存取控制器(MAC Controller)之硬體設計暨實作。此媒體存取控制器提供網路中實體層及媒體控制層大部份的功能。在設計上，我們將其功能分成三部份： ISA BUS介面、協定控制單元及無線天線介面，以提供較佳的修改彈性。
我們採用可程式化邏輯裝置(PLD)來簡化系統雛型的發展，並以Altera公司所發展的MAX+PLUSII軟體做為我們建立系統雛型的工具。MAX+PLUSII軟體提供簡易的設計環境，協助我們針對設計做功能上的驗證及建立系統雛型晶片。我們將行動台與基地台的硬體整合在一顆晶片之中，可藉由軟體驅動程式的設定來提供我們所需要的功能。最後我們採用含有208根針腳及1152個邏輯單元的Altera PLD來實做我們的設計。

SWAP (Shared Wireless Access Protocol) system supports both voice and data transmissions, covering up to 50 meters in semidiameter. The SWAP technology may enable interoperability between many different consumer electronic devices. If combined with the personal computer serial bus standards, such as USB (Universal Serial Bus) and IEEE 1394, and the home automation techniques, the SWAP may extent its application to various fields.
In this thesis, we will introduce the SWAP specification, propose a packet format that supports this specification, and design and implement the Medium Access Control (MAC) Controller for the protocol. The MAC controller provides most of the functions of the Physical and MAC layers. To provide flexibility, the design is divided into three major blocks: the bus interface unit, the protocol control unit, and the transceiver interface unit.
We adopt the Programmable Logic Devices (PLDs) in our implementation to facilitate the system prototyping, and build the system prototype in the MAX+PLUSII software environment developed by Altera Ltd. The MAX+PLUSII software provides an easy design environment and quick function verification for us to build the system prototype chip. We integrate the function of the base station and the mobile station into a single chip, and the software driver may configure this chip to provide the required function. Finally, We implement our design with the Altera device that has 208 pins with 1152 logic cells.

ABSTRACT IN CHINESEi
ABSTRACTii
Acknowledgementiv
Contentsv
List of Figuresviii
List of Tablesix
Chapter 1 Introduction1
Chapter 2 Background4
2.1 PROTOCOL OVERVIEW4
2.2 NETWORK TOPOLOGY5
2.3 FRAME STRUCTURE6
2.3.1 Frame Header Period7
2.3.2 Isochronous Retransmission Period7
2.3.3 Asynchronous Transmission Period8
2.3.4 Isochronous Transmission Period8
2.4 FUNCTIONALITY OF THE MAC CONTROLLER8
2.5 PROPOSED PACKET FORMATS9
Chapter 3 Design of the MAC Controller12
3.1 BUS INTERFACE UNIT13
3.1.1 ISA Bus Interface14
3.1.2 Register File14
3.1.3 Dual-Port RAM Controller21
3.2 PROTOCOL CONTROL UNIT23
3.2.1 Synchronization Controller24
3.2.2 Frame Controller25
3.2.3 CSMA/CA Controller26
3.2.4 DECT Controller28
3.2.5 Transmit State Machine30
3.2.6 Receive State Machine31
3.3 TRANSCEIVER INTERFACE UNIT33
3.3.1 Modem Controller34
3.3.2 Transmit Serialization Logic35
3.3.3 Receive Deserialization Logic36
3.3.4 CRC Generation/Checking Logic36
3.3.5 Data Scrambling Logic37
3.3.6 Data Descrambling Logic38
3.3.7 Synchronization Pattern and Unique Word Generator/Checker38
Chapter 4 Implementation of the MAC Controller40
4.1 DESIGN ENVIRONMENT40
4.2 PROJECT PROCESSING41
4.3 PIN DESCRIPTIONS44
4.4 DESIGN VERIFICATION47
Chapter 5 Conclusions and Future Work48
References50
Appendix51

[1] " Technical Summary of the SWAP Specification, " http://www.homerf.org/tech/hrfwgtec.pdf.
[2] " Home RF Working Group Technical Representation," http://www.homerf.org/tech/techpres.pdf.
[3] Project IEEE 802.11, "IEEE Standard for Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications," Draft 6.1, June 1997.
[4] B. P. Crow, I. Widjaja, L. G. Kim, and P. T. Sakai, "IEEE 802.11 Wireless Local Area Networks," IEEE Communication Magazine, vol. 35 9, pp. 116-126, Sept. 1997.
[5] K.D. Fan and C.C. Hung, "A Medium Access Protocol and Its Implementation for Slow Frequency Hopping Based Wireless PCNs," 國科會成果報告, Oct. 1995.
[6] Advanced Micro Devices, Am79C930: PCnet-Mobile Single Chip Wireless LAN Media Access Controller, April 1995.
[7] National Semiconductor, DP8390/NS32490D NIC Network Controller, July 1995.
[8] Cypress Semiconductor, CY7C006/CY7C016 16K×8/9 Dual-port Static RAM with Sem, Int, Busy, Feb. 1996.
[9] T. Shanley and D. Anderson, ISA System Architecture, Addison Wesley Pub, 1995.