臺灣博碩士論文加值系統

在傳統的無線區域網路中，在實體層是以直接序列展頻作為調變方式。直接序列展頻可以輕易達到時序和載波回復，並有效抵抗無線通道中的多路徑效應。然而其資料的最大傳送速率只能到達2MBps，比一般有線網路低了許多，因而使得其應用範受到了限制。為了能突破現有協定的傳送速度瓶頸，必須提出新的調變方法。
在這篇論文中我們比較了數種調變方式，最後決定設計一個可以使用CCK8和MBOK的基頻處理器。MBOK和CCK8在編碼上十分類似，皆能達到11MBps的最大傳送速度，由於CCK8將資料以複數的方式加以編碼，能夠避免因為多路徑效應所造成的軸間干擾問題，並且不需要載波回復。而為了提高系統的效能， 我們也提出了一個可以消除信號間干擾的可適性回授等化器。經由程式的模擬，我們驗證了系統功能的正確。
在系統的架構設計中，原有的直接序列展頻被作為封包頭的傳送，並藉此達成時序和載波回復，而可適性等化器在此對於其係數作訓練。而在高速模式中，關連器將收到的信號和MBOK或CCK8碼做關連運算。由於特性相似，兩者可以使用相同的硬體作解調。待架構設計完成，我們對於系統中輸入及匯流排的位元寬度做最佳化模擬，以節省硬體成本。
在硬體製作方面，整個系統以硬體描述語言做描述，經模擬驗證功能描述的正確後， 我們使用邏輯合成軟體將硬體以FPGA實作， 經測試後可以驗證系統架構之正確性。

In order to improve the performance of current wireless local area network (WLAN) , which uses direct sequence spread spectrum (DSSS) for modulation, a baseband transceiver forhigh speed WLAN application is proposed in this thesis. New modulation
schemes, including M-ary bi-orthogonal keying (MBOK) and complementary code keying withlength 8 (CCK8), are proposed for high speed transmission. The system is compatible with previous DSSS modulation using the Barker sequence. An equalizer that compensates for intersymbol interference (ISI) is included in the design to better the performance under multipath fading channel.
The basic principles of WLAN and its related technology are illustrated in the thesis. Functional and fixed-point simulation are performed to verify the proposed architecture. Besides the gate level netlist for ASIC design, the whole system is implemented in an FPGA emulation module. The testing results show that the proposed architecture is practical in the future. By means of further optimization on the correlator and equalizer design, the performance and cost can be further improved.

1. Introduction 1
1.1 Overview of Digital Wireless Communication 1
1.2 Overview of Wireless Local Area Netowrk 3
1.3 Organization 7
2. Direct Sequence Spread Spectrum for Wireless LAN 9
1.1 Channel Characteristics of Wireless LAN 9
2.1.1 Fading Effects due to Doppler Spread 10
2.1.2 Fading Effects due to Multipath Time Delay Spread 11
2.1.3 Multipath Modeling 13
1.2 Concepts of Spread Spectrum 15
1.2.1 Direct Sequence Spread Spectrum 16
1.2.2 Frequency Hopping Spread Spectrum 18
1.3 Direct Sequence Spread Spectrum for Wirelss LAN Application 20
1.3.1 Transceiver Architecture 21
1.3.2 Code Synchronization 21
1.3.3 Carrier Recovery 22
3. High Rate Modulation for Wireless LAN 25
3.1 Waveform Selection 25
3.2 MBOK Modulation 28
3.3 CCK8 Modulation 32
3.4 Anti-Intersymbol Interference Techniques 34
3.4.1 RAKE Receiver Architecture 34
3.4.2 Adaptive Equalizer 36
3.5 Functional Simulation 39
4. System Architecture 45
4.1 Design Consideration 45
4.2 Transmitter Design 46
4.3 Receiver Design 47
4.3.1 Acquisition Parts Design 49
4.3.2 Carrier Recovery 55
4.3.3 MBOK, CCK8 Demodulator Design 56
4.4 Equalizer Design 63
4.5 Fixed-Point Functional Simulation 64
5. Hard Implementation and Measuring Result 67
5.1 HDL Description 67
5.2 FPGA Implementation 69
6. Conclusion and Future Work 77

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