摘要
隨著數位無線通訊時代的來臨，人們的生活將受到極大的改變，從手機的普及化趨勢看來，未來無線通訊在其它生活層面可能潛在著一個龐大的市場。在這個領域裡，功率放大器扮演著一個極重要的角色。一個無線通訊系統的效能往往取決於主動元件的功率操作性能，除此以外，主動元件之成本也決定了產品在市場上的優勢。因此，我們採用離子佈值金屬半導體接面場效電晶體作為我們功率放大器之主動元件並評估其在0.9GHZ和1.8GHz頻率操作下的功率效能。我們發現它們在線性區具有19.95dB的放大倍率，另外在飽和區也有達到75%的功率加成效率(Power-added Efficiency)。另外，這些元件也表現出它們優越的高頻操作能力，當閘極線寬0.8微米時，離子佈值金屬半導體接面場效電晶體的截止頻率(fT)和最大振盪頻率(fmax)分別為20GHz和37GHz。這些結果暗示著場效電晶體在高頻高功率市場上的潛力。
另外，為了要使電晶體有更高的增益與電流值，縮小元件主動區的大小是必然的趨勢。其首要課題便是如何縮短閘極的長度。因此，我們利用光阻加熱流動的特性以及三層光阻的方法，設計了一套次微米閘極的製程步驟，並且實際驗證其可行性。透過原子力顯微鏡(AFM)和電子掃瞄顯微鏡(SEM)的量測資訊，我們可以觀察成功製作出來的蘑菇型閘極並初步驗證此技術在異質接面元件上的可行性。

Abstract
Power performance of 0.8 um ion implanted metal-semiconductor field effect transistors (MESFET) has been proposed. We also have demonstrated its DC and microwave characteristics of these devices. They have a high unity current-gain frequency up to 20 GHz and maximum oscillation frequency 37GHz. In addition, power performance of these devices with 2X100 um gate width was measured by load-pull system. An ultra-high power-added efficiency in MESFET devices around 75% with Psat 17.2 dBm were obtained.
Besides, in order to enhance the device high frequency performance, a detailed tri-layer photoresist T-gate fabrication process was proposed. By this novel tri-layer photoresist method, we demonstrated that a submicron T-gate could be fabricated by much cheaper traditional mask aligner system compared to E-beam or X-ray lithography process. The scanning electron microscope (SEM) photographs and atomic force microscope (AFM) pictures were to illustrate the out-looking of fabricated T-gate and some problems one could have to deal with. In the other hand, the airbridge gate and drain metal can be developed with the T-shaped gate to enhance the microwave performance and output power density.

Chapter 1 Introduction
1.1 Power Transistors by Ion Implanted MESFET
1.2 The Submicron T-gate Process
Chapter 2 The Submicron T-gate FET Technique
2.1 Introduction
2.2 The Ideas of Submicron T-gate Process
2.2.1 Why T-shape
2.2.2 Photo/EB Hybrid Exposure Process for T-gate
2.2.3 Dielectric-defined Process in T-gate Formation
2.2.4 All Deep-UV Lithography by low/high/low Trilayer
Resist In T-gate Formation
2.2.5 Y-shape-gate formed by dielectric sidewall
2.3 Influence on T-Gate Shape on FET’s High Frequency
Performance
2.4 Summary
Chapter 3 Realization of Submicron T-Gate by Tri-Layer
Photoresists System
3.1 Introduction
3.2 The Profile of First Photoresist Layer
3.3 The Implement of Submicron T-gate by a Novel Tri-level
Normal UV photoresist
3.3.1 The Way to Fabricate Submicron T-gate by Tri-level
Normal UV photoresists
3.3.2 The Choice of Photoresists and Developers
3.3.3 Intermixing Problem Occurred between PMMA and S1813
3.4 Experiment Results
3.5 Summary
Chapter 4 MESFET Fabrication and Optimization
4.1 Introduction
4.2 Layer Structure and Device Fabrication
4.2.1 Layer Structure and Formation
4.2.2 Fabrication of 0.8um Gate FET's
4.3 DC Characteristics
4.4 Microwave Characteristics
4.5 Power Performance
4.5.1 Power Analysis in Linear Region
4.5.2 Large Signal Power Operation
4.5.3 Measurement Results
4.6 Summary
Chapter 5 Conclusion
5.1 Final Comments
5.2 Suggestion of Future work

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