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研究生:周代琦
研究生(外文):Chou Tai-Chi
論文名稱:單相變流器空白時間之補償策略
論文名稱(外文):Dead-time Compensation for the Single-Phase Inverters
指導教授:羅有綱
指導教授(外文):Lo Yu-Kang
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1999
畢業學年度:87
語文別:中文
論文頁數:46
中文關鍵詞:空白時間
外文關鍵詞:dead-time
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在變流器中,為了防止直流端短路,通常會在切換訊號中加入時間延遲。我們稱此時間延遲為空白時間。在脈波寬度調變(Pulse-width modulation, PWM)變流器中,空白時間將導致輸出電壓的基本波減少和低次諧波增加。在交流變頻的馬達系統中,基本波減少會造成力矩的減小。在不斷電電源供應系統中,低次諧波會污染基頻輸出電壓。
為了補償空白時間的影響,本論文列舉三種補償方法。它們皆適用於正弦式(Sinusoidal)和以記憶體為主的PWM變流器。最後本論文以單相半橋式變流器為架構,用實際的電路實驗證明此三種補償方法可有效消除空白時間的影響。

In pulse-width modulation (PWM) inverters, time delay is inserted in switching signals to prevent a short circuit in the dc link. The time delay is referred to here as the ”dead time”. Dead time can cause a reduction in the fundamental component of the output voltage and an increase in low order harmonics. In variable speed motor systems, the reduction in fundamental voltage causes a reduction in the torque. In uninterruptible power supply(UPS)systems, the low order harmonics are difficult to remove, with the result that the fundamental output voltage is contaminated.
To compensate the effect of dead times, three methods that are adequate for sinusoidal and memory-based PWM are presented in this thesis. The single-phase half-bridge inverter configuration is used as an experimental prototype. Results show that the dead time’s effects can be substantially eliminated by these compensation methods.

第一章 緒論……………………………………………………… 1
1.1 研究動機………………………………………………… 1
1.2 論文編排方式…………………………………………… 5
第二章 改變參考波形之補償方式………………………………. 6
2.1 補償電路之工作原理……………………………………. 6
2.2 實作電路………………………………………………….13
2.3 實驗結果………………………………………………….16
第三章 以電流方向理論為基礎之邏輯電路補償方式…………..21
3.1 補償電路之工作原理……………………………………..21
3.2 實作電路…………………………………………………..24
3.3 實驗結果…………………………………………………..26
第四章 記錄空白時間之邏輯電路補償方式……………………..32
5.1 補償電路之工作原理……………………………………..32
5.2 實作電路…………………………………………………..35
5.3 實驗結果…………………………………………………..36
第五章 結論………………………………………………………..43
5.1 實驗結果比較……………………………………………..43
5.2 結語………………………………………………………..43
參考文獻………………………………………………………………...45

參考文獻
【1】N. Mohan, T. M. Undeland and W. P. Robbins, “Power Electronics: Converters, Applications, and Design,” New York: Wiley, 1989,Ch.8.
【2】J. G. Kassakian, M. F. Schlecht and G. C. Verghese, “Principles of Power Electronics,” MA: Addison Wesley, 1991.
【3】鄭振東,“不斷電電源裝置技術UPS,”建興, 1994。
【4】鄭大森,“Pspice視窗版Design Center在電力電子上的應用,”全華, 1996.
【5】H. S. Patel and R. G. Hoft, “Generalized Techniques of Harmonic Elimination and Voltage Control in Thyristor Inverters: Part I-Harmonic Elimination,” IEEE Trans. Industry Applications, vol. IA-9, pp. 310-317, May/June 1973.
【6】 P. Enjeti, P. D. Ziogas, J. F. Lindsay, and M. H. Rashid, “A new PWM speed control system for high performance ac motor drives,” in Conf. Rec. IEEE IAS Annual Meeting 1987, pp. 303-311.
【7】P. D. Evans and P. R. Close, “Harmonic distortion in PWM inverter output waveforms,” IEE Proc., vol. 134, pt B, no. 4, pp. 224-232, 1987.
【8】Y. Murai, T. Watanabe and H. Iwasaki, “Waveform distortion and correction circuit for PWM inverters with switching lag-times,” IEEE IAS Annual Meeting, Toronto, Oct. 1985, pp. 436-441.
【9】D. A. Grant and R. Seidner, “Ratio changing in pulse-width-modulated inverters,” IEE Proc., vol. 128, pt B, no. 5, pp. 243-248, 1981.
【10】G. S. Buja and G. B. Indri, “Optimal pulsewidth modulation for feeding ac motors,” IEEE Trans. Industry Applications, vol. IA-13, no. 1, pp. 38-44, Jan./Feb. 1977.
【11】Y. Murai, T. Watanabe and H. Iwasaki, “Waveform Distortion and Correction Circuit for PWM Inverters with Switching Lag-Times,” IEEE Trans. Industry Applications, vol. IA-23, no. 5, pp. 881-886, September/October 1987.
【12】R. C. Dodson, P. D. Evans, H. T. Yazdi, and S. C. Harley, “Compensating for dead time degradation of PWM inverter waveforms,” IEE Proc., vol. 137, pt. B, no. 2, pp. 73-81, March 1990.
【13】S. G. Jeong and M. H. Park, “The Analysis and Compensation of Dead-Time Effects in PWM Inverters,” IEEE Trans. Industrial Electronics, vol. 38. no. 2, pp. 108-114, April 1991.

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