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研究生:詹戊賓
研究生(外文):Chan Wu-Pin
論文名稱:多邊形現場可規劃連線晶片之積體電路設計
論文名稱(外文):VLSI Design of A Polygonal Field Programmable Interconnect Chip
指導教授:藍信彰藍信彰引用關係林銘波林銘波引用關係
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1999
畢業學年度:87
語文別:中文
論文頁數:45
中文關鍵詞:現場可規劃連線晶片繞線網路虛擬線路
外文關鍵詞:FPICPMCMVirtual Wire
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本論文的主要目的在於研究可規劃多晶片模組上(Programmable Multiple Chip Module, PMCM)的繞線網路系統,為了提供可動態規劃連線的特性,在PMCM中使用了多顆的現場可規劃連線晶片(Field Programmable Interconnect Chip, FPIC)提供繞線功能。由於整個繞線網路的架構設計會影響FPIC的功能、晶片面積大小、和繞線能力,因此本論文中所設計的FPIC使用了多邊形繞線模組和虛擬線路的觀念,設計一個具有良好繞線能力和成本效益的繞線網路。與傳統四邊形的繞線模組設計比較下,多邊形繞線模組的設計可以明顯地減少了整個繞線模組所需要的可規劃交換元件(Programmable Switches)數目,因此減少了晶片面積並且降低成本。應用虛擬線路的觀念可以產生許多虛擬的I/O腳位,提供了更有彈性的繞線能力,有效地解決以FPGA為主的硬體模擬器腳位限制的問題,提高了FPGA電路閘的使用率、加快連線的速度和降低系統的成本。
In this thesis, we explore the routing network of PMCM (Programmable Multiple Chip Module) system. In order to facilitate a cost effective routing network with dynamic programming feature, an FPIC (Field Programmable Interconnect Chip) is designed and implemented with CMOS technology.
The major feature of the proposed FPIC are as follow: It adapts a polygonal routing module instead of the conventional square routing module, and uses the concept of virtual wire to effectively provide more virtual I/O pins for solving the pin limitation problem: usually encountered in the hardware emulator based on FPGAs. The results show that the number of programmable switches used in the FPIC can be reduced considerably. In addition, by using the proposed FPIC, the FPGA-based emulator can increase the gate utilization of FPGA, reduce the critical path delay of the system, and reduce the system cost.
1.1 FPIC的緣由和目的……………………………………… 1
1.2 FPIC的應用……………………………………………… 4
1.3 章節介紹…………………………………………………. 5
第二章 FPIC的架構…………………………………………….. 6
2.1 FPIC 設計的要點…..………………………………….. 6
2.2 FPIC 的連線架構…..………………………………….. 8
2.3 虛擬線路的觀念和應用………………………………… 19
2.4 I/O埠的架構……………………………………………. 28
2.5 規劃資料的架構………………………………………… 29
第三章 FPIC電路設計…………………………………………. 31
3.1 繞線模組電路的設計…………………………………… 31
3.2 I/O和虛擬線路電路的設計……………………………. 35
3.3 規劃資料電路的設計…………………………………… 37
第四章 電路佈局和模擬結果.………………………………….. 39
第五章 結論………………………………………….………….. 42
參考文獻………………………………………………………….. 44
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2. Berger, R et al., ”A Laser-Programmable Multi-Chip Module on Silicon,” in Proceedings of the Fifth Annual IEEE International Conference on Wafer Scale Integration, pp. 30-35, January 1993.
3. Gernet, S. et al., ”Programmable Interconnect Substrate,” European Semiconductor, vol. 14, no. 3, pp. 23-25, March 1992.
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5. J. Rose and R. J. Francis, D. Lewis , and P. Chow, “Architecture of Field Programmable Gate Arrays: The Effect of Logic Block Functionality on Area Efficiency,” IEEE J. Solid State Circuit, vol.25, no.5,pp. 1217-1255, October 1990.
6. K. Fujiyoshi., T. Kajitani., and H. Niitsu, “Design of Optimum Totally-Perfect Conecttion-Blocks of FPGA,” in Proceedings of the IEEE International Symposium on Circuit and System, pp.221-224, 1994
7. J.Rose and S. Brown, “Flexibility of Interconnection Structures for Field Programmable Gate Arrays,” IEEE J. Solid State Circuits, vol.26, no.3, pp.277-282, March 1991
8. Y. Sun , T. C. Wang, C.K. Wong, and C. L. Liu, “ Routing for Symmetric FPGAs and FPICs,” Proc. IEEE Trans. Computer Aided Design, vol.16, no.1, pp.20-31, January 1997.
9. B. Landman and R.Russo. “On a Pin Versus Block Relationship for Partition of Logic Graphs,” IEEE Transactions on Computer, C-20(12), December 1971
10. Mao-Hsu Yen.,Mon-Chau Shie.,and Sanko H. Lan., “Polygonal Routing Network for FPGA/FPIC, ” Conference of International Symposium on VLSI Technology , System , and Application, 1999
11. Jonathan Babb,Russell Tessier,Matthew Dahl,Silvina Zimi Hanono,David M. Hoki, and Anant Agarwal ,”Logic Emulation with Virtual Wires” IEEE Trans. On Computer-Aided Design of Integrated Circuit and Systems, vol.16. No.6. pp 609-625, June 1997.
12. Neil H. E. Weste, Kamran Eshrahian, Principles of CMOS VLSI Design , Addison-Wesley Publishing Company, 1993
13. Paul Chow, G. et al , “Architecture and Circuit-Level Design of an SRAM-Based Field-Programmable Gate Array”, Technical Report, Department of Electrical and Computer Engineering, University of Toronto, 1997.
14. Shun-Fu Juang., “A Field Programmable Interconnect Chip” , Master Thesis, Department of Computer Science,University of National Tsing Hua , 1995.
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