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研究生:王文宏
研究生(外文):Wen-horng Wang
論文名稱:支援即時性流量之非同步傳輸模式交換機之優先權控制
論文名稱(外文):Priority control of ATM switches supporting real-time traffic
指導教授:鍾順平
指導教授(外文):Shun Ping Chung
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電機工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1999
畢業學年度:87
語文別:中文
論文頁數:99
中文關鍵詞:即時性服務封包喪失優先權部分緩衝器分享叢發性時間延遲
外文關鍵詞:real-time servicescell lossprioritypartial buffer sharingburstinesstime delay
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以ATM為基礎之B-ISDN之一關鍵組件是ATM交換機,且B-ISDN之未
來流量之一主要部份應是即時性服務(例如語音、視訊及多媒體)。我們考
慮具有有限輸入及輸出緩衝器且支援即時性服務之通屬N×N內部無阻塞
ATM交換機。相對於資料傳輸,即時性語音及視訊是延遲敏感但喪失遲
鈍,因此,ATM交換機之封包喪失不僅應包含由於緩衝器滿溢所造成之
封包喪失而且也應包含由於過多延遲所造成之封包喪失。在本文中有效
封包喪失是定義成為以上二種封包喪失之和。另外由於壓縮或編碼之故
,同一連結之封包中可具有不同之優先權,例如低優先權及高優先權兩
種封包。我們使用部分緩衝器分享方法,來提供不同之封包喪失機率給
不同優先權之封包。主要研究重點是在符合高及低封包喪失機率要求之
前提下,尋找ATM交換機的最大提供負載,來分析具有有限輸入緩衝/輸
出緩衝預算之ATM交換機之緩衝器臨限值之最佳分配。我們顯示仔細選
擇輸出入緩衝臨限值可以增加ATM交換機的最大提供負載,反之錯誤的
選擇可能使得最大提供負載為零。其次我們考慮叢高優先權封包機率對
ATM交換機效能的影響。我們發現高優先權封包機率越小,則可得到的
效能改善越明顯。接著我們考慮叢發-閒置輸入流量對交換機效能之影響
。我們發現在均勻流量之下,使用部分緩衝器分享可增加的最大提供負
載非常少,但是在叢發性流量之下,使用部分緩衝器分享可以有更高之
最大提供負載。最後我們發現在叢發性流量時,若部分緩衝器分享不考
慮時間延遲,所導致之延遲封包喪失會減少,而ATM交換機之最大提供
負載會較高。

One key element of ATM-based B-ISDN is ATM switch. One major part of
the future traffic of B-ISDN should be real-time services (e.g., voice, video, and
multimedia.) We consider generic internally nonblocking ATM switches with
finite input/output buffers and supporting real-time services. In contrast to data
transmission, real-time voice and video are delay sensitive but loss insensitive.
Thus, cell loss in ATM switch should include both overflow cell loss due to
buffer overflow and delay cell loss due to excessive delay in switch. Effective
cell loss is defined as the sum of overflow and delay cell losses. Furthermore,
due to compression and encoding, cells in the same connection could have
different priorities, e.g., high-priority and low-priority. We employ PBS (partial
buffer sharing) to provide different cell loss probabilities to different priority
cells. The key study is, by finding the maximum offered load of ATM switch,
provided that both low and high priority cell loss probability requirements are
satisfied, the optimal buffer threshold allocation is studied with the constraint
that input/output buffers are finite and fixed. We show that with correct
input/output buffer thresholds, the maximum offered load can be increased
compared to without using PBS. On the other hand, with wrong choices, the
maximum offered load might reduce to zero. It is also shown that the smaller
the high priority cell probability, the larger the performance improvement. With
uniform input traffic, the maximum offered load could only increase a little
using PBS. With bursty input traffic, the maximum offered load increase is
more significant. Last but not least, if delay cell loss is negligible, the maximum
offered load could be higher using PBS.

中文摘要I
英文摘要II
目錄III
圖目錄IV
表目錄VIII
第一章 緒論1
第二章 系統模型 5
2.1 ATM交換機模型5
2.2 有效封包喪失 6
2.3 輸入/輸出緩衝器 7
2.4 流量模型 9
2.5 優先權控制 12
第三章 數值結果分析 17
3.1 簡介 17
3.2 輸入與輸出緩衝器
臨限值對ATM交換
機效能的影響18
3.3 輸入流量叢發性對
ATM交換機效能的
影響 23
3.4 高優先權封包機率
對ATM交換機效能
的影響 24
3.5 時間延遲對ATM交
換機效能的影響25
第四章 結論 69
參考文獻 72
附錄一 流程圖 76
附錄二 電腦程式 83

[1] P. Newman, "ATM technology for corporate networks", IEEE Comm. Mag., pp.90-101, Apr. 1992.
[2] F.A. Tobagi, "Fast packet switch architectures for broadband integrated services digital networks", Proc. IEEE, Vol.78, No.1, pp.133-166, Jan. 1990.
[3] Steffora, "ATM: the year of the trial", IEEE Computer, Vol.27, No.4, pp.8-10,Apr. 1994.
[4] R. Rooholamini, V. Cherkassky, and M. Garver, "Finding the right ATM switch for the market", IEEE Computer, Vol. 27, No.4, pp.16-28, Apr. 1994.
[5] J.S.-C Chen, and T.E. Stern, "Throughput analysis, optimal buffer allocation, and traffic imbalance study of a generic nonblocking packet switch", IEEE JSAC, Vol.9, No.3, pp. 439-449, Apr. 1991.
[6] Pattavina, and G. Bruzzi, "Analysis of input and output queueing for nonblocking ATM switches", IEEE/ACM Trans. on Networking, Vol.1, No.3, pp.314-328, June 1993.
[7] H.F. Badran, and H.T. Mouftah, "Input-output-buffered broadband packet-switch architecture with correlated input traffic", Canadian J. Electrical and Computer Engineering, Vol.18, No.3, pp.133-139, 1993.
[8] A.K. Gupta, and N.D. Georganas, "Analysis of a packet switch with input and output buffers and speed constraints", Infocom'91, pp.694-700, Apr. 1991.
[9] Iliadis, "Performance of packet switches with input and output queueing under unbalanced traffic," Infocom'92, pp.743-752, May 1992.
[10] H. Shi, and O. Wing, "Design of a combined input/output buffered ATM switches with arbitrary switch size, buffer size, and speed-up factor", Proc. ISCA/ACM Sigcomm 2nd Int. Conf. Computer Commun. and Networks ( ), San Diego, CA, pp.377-382, June 1993.
[11] M. de Prycker, Aysnchronous Transfer Mode: solution for broadband ISDN, Ellis Horwood Limited, 1991.
[12] D.X. Chen, and J.W. Mark, "Performance analysis of output buffered fast packet switches with bursty traffic loading", Globecom'91, Phoenix, AZ, pp.455-459, Dec. 1991.
[13] S.C. Liew, "Performance of input-buffered and output-buffered ATM switches under bursty traffic: simulation study", Globecom'90, San Diego, CA, pp.1919-1925, Dec. 1990.
[14] M.A. Pashan, M.D. Soneru, and G.D. Martin, "Technologies for broadband switching", AT&T Tech. J., pp.39-47, Nov./Dec. 1993.
[15] S.-Q. Li, "Performance of a nonblocking space-division packet switch with correlated input traffic", IEEE Trans. Comm., Vol.40, No.1, pp. 97-108, Jan. 1992.
[16] Makhamreh, N.D. Georganas, and D. McDonald, "Analysis of an output-buffered ATM switch with speed-up constraints under correlated and imbalanced bursty traffic", IEEE Proc.Commun., Vol.142, No.2, pp.61-66, Apr. 1995.
[17] L. Jacob and A. Kumar, "Delay performance of some scheduling strategies in an input queueing ATM switch with multiclass bursty traffic", IEEE/ACM Trans. Networking, Vol.4, No.2, pp.258-271, Apr. 1996.
[18] M. J. Lee and D.S. Ahn, "Cell loss analysis and design trade-offs of nonblocking ATM switches with nonuniform traffic", IEEE/ACM Trans. Networking, Vol.3, No.2, pp.199-210, Apr. 1995.
[19] Pattavina, "Nonblocking architectures for ATM switching", IEEE Comm. Mag., pp. 38-48, Feb. 1993.
[20] T.T. Lee, "A modular architecture for very large packet switches", IEEE Trans. Comm., Vol. 38, No.7, pp.1097-1106, July 1990.
[21] Y. Oie, M. Murata, K. Kubota, and H. Hiyashaba, "Performance analysis of non blocking packet switch with input and output buffers", IEEE Trans. Comm., Vol.40, No.8, pp.1294-1297, Aug. 1992.
[22] Iliadis, "Performance of a packet switch with input and output queueing under unbalanced traffic", Infocom'92, Florence, Italy, pp.743-752, May 1992.
[23] R.W. Muise, T.J. Schonfeld, and G.H. Zimmerman,Ⅲ, "Experiments in wideband packet technology" Zurich Sem. Digital Comm. 1986.
[24] V.F. Hartano and H.R. Sirisena, "User-network policer: A new approach for ATM congestion control," Infocom, pp.376-383, 1993.
[25] K. Sriram, R.S. Mckinney and M.H. Sherif, "Voice packetization and compression in broadband ATM netwrk," IEEE JSAC, 9(3), pp.294-304, Apr. 1991.
[26] N. Jayant, "Signal compression : technology targets and research directions," IEEE JSAC, 10(5) ,pp.796-818, Jun. 1992.
[27] M. Ghanbari, "Two-layer coding of video signals for VBR networks," IEEE JSAC, 7(5), pp.771-781, Jun. 1989.
[28] S.W. Min, H. Chung, and C.K. Un, "Cell loss analysis of an ATM multiplexer with loss priority control for VBR bursty traffic," Computer Comm., pp.487-497, 19(1996).
[29] H. Kroner, G. Hebutene, P. Boyer and A. Gravey, "Priority management in ATM switching nodes," IEEE JSAC, 9(3), pp.408-417,Apr. 1991.
[30] F. Hartano, H.R. Sirisena, and K. Pawlikowski, "Protective buffer policies at ATM switches," ICC, pp.960-964, 1995.
[31] N. Yin, S.-Q. Li and T.E. Stern, "Congestion control for Packet voice by selective packet discarding," IEEE Trans. on Comm., 38(5), pp.674-683,May 1990,.
[32] V.F. Hartano and H.R. Sirisena, K. Pawlikowski,and W.K. Kennedy, "Performance study of dual queues with limited cyclic service in ATM switching," SICON, pp.253-258, Singapore, Sep. 1991.
[33] J.S.-C. Chen and R. Guerin, "Performance study of an input queueing packet switch with priority classes," IEEE Trans. on Comm., Vol.39, No.1, pp.117-126, Jan. 1991.
[34] S.P. Chung, "Performance analysis and design tradeoffs of I/O buffered ATM switches with real-time traffic," in preparation.

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