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[1] J. H. Huijsing and D. Linbarger, "Low-voltage operation amplifier with rail-to-rail input and output ranges," IEEE J. Solid-State Circuits, Vol. SC-20, pp. 1144-1150, Dec. 1985. [2] T. Fiez et al., "A family of high swing CMOS operational amplifiers," IEEE J. Solid-State Circuits, Vol. 24, pp. 1683-1687, Dec. 1989. [3] R. E. Vallee and E. I. El-Masry, "A very high frequency CMOS complementary folded cascode amplifier," IEEE J. Solid-State Circuits, Vol. SC-29, pp. 130-133, Feb. 1994. [4] J. Lloyd and H. S. Lee, "A CMOS opamp with fully-differential gain enhancement," IEEE Trans. Circuit Syst-II, Vol. 41, pp.241-243, Mar. 1994. [5] E. Sackinger and W. Guggenbuhl, "A high swing, high-impedance MOS cascode circuit," IEEE J. Solid-State Circuits, Vol. SC-25, pp. 289-297, Feb. 1990. [6] D. J. Allstot, R. W. Brodersen, and P. R. Gray, "MOS switched capacitor ladder filters," IEEE J. Solid-State Circuits, Vol. SC-13, pp. 806-814, Dec. 1987. [7] P. R. Gray and R. G. Meyer, "MOS operational amplifier design-a tutorial overview," IEEE J. Solid-State Circuits, Vol. SC-17, pp. 969-982, Dec. 1982. [8] J. E. Solomon, "The monolithic op amp: a tutorial study," IEEE J. Solid-State Circuits, Vol. SC-9, pp. 314-332, Dec. 1974. [9] Z. Y. Chang and Willy M. C. Sansen. Low-noise wide-band amplifiers in bipolar and CMOS technologies: Kluwer academic publishers, 1991. [10] R. H. Dennard, F. H. Gaensslen, H. N. Yu, V. L. Rideout, E. Bassous, and A. R. LeBlanc, "Design of ion-implanted MOSFET's with very small physical dimensions," IEEE J. Solid-State Circuits, Vol. 9, pp. 256-268, Oct. 1974. [11] J. E. Chung, M. C. Jeng, J. E. Moon, P. K. Ko, and C. Hu, "Performance and reliability design issue for deep-submicrometer MOSFET's," IEEE Transactions on Electron Devices, Vol. 38, pp. 545-554, Mar. 1991. [12] C. Hu, S. C. Tam, F. C. Hsu, P. K. Ko, T. Y. Chan, and K. W. Terrill, "Hot-electron-induced MOSFET degradation-model, monitor, and improvement," IEEE Transactions on Electron Devices, Vol. ED-32, pp. 375-385, Feb. 1985. [13] E. A. Vittoz, "The design of high-performance analog circuits on digital CMOS chips," IEEE J. Solid-State Circuits, Vol. 20, pp. 657-665, Jun. 1985. [14] E. Sano, T. Tsukahara, and A. Iwata, "Performance limits of mixed analog/digital circuits with scaled MOSFET's," IEEE J. Solid-State Circuits, Vol. 23, pp. 942-949, Aug. 1988. [15] S. Wong and C. A. T. Salama, "Impact of scaling on MOS analog performance," IEEE J. Solid-State Circuits, Vol. 18, pp. 106-114, Feb. 1983. [16] T. Enomoto, T. Ishihara, M. Yasumoto, and T. Aizawa, "Design fabrication, and performance of scaled analog IC's," IEEE J. Solid-State Circuits, Vol. 18, pp. 395-402, Aug. 1983. [17] C. G. Sodini, S. S. Wong, and P. K. Ko, "A framework to evaluate technology and device design enhancements for MOS integrated circuits," IEEE J. Solid-State Circuits, Vol. 24, pp. 118-127, Feb. 1989. [18] P. Antognetti, G. Massobrio. Semiconductor device modeling with SPICE: McGraw-Hill book company, 1987. [19] E. Seevinck, R. F. Wassenaar, "A versatile CMOS Linear transconductor/square-law circuit," IEEE J. Solid-State Circuits, Vol. 22, pp. 366-377, Jun. 1987. [20] P. E. Alien and D. R. Holberg. CMOS analog circuit design: Oxford University Press, Inc., 1987. [21] M. J. Fonderie, and J. H. Huijsing. Design of low-voltage bipolar operational amplifiers: Kluwer Academic Publishers, 1993. [22] M. J. Fonderie, M. M. Maris and E. J. Schnitger, "l-V operational amplifrer with rail-to-rail input and output ranges," IEEE J. Solid-State Circuits, Vol. SC-24, pp. 1551-1559, Dec. 1989. [23] J. A. Fisher and R. Koch, "A highly linear CMOS buffer amplifier," IEEE J. Solid-State Circuits, Vol. SC-22, pp. 330-334, Jun. 1987. [24] M. Steyaert and W. Sansen, "A high-dynamic-range CMOS op amp with low distortion output structure," IEEE J. Solid-State Circuits, Vol. SC-22, pp. 1204-1207, Dec. 1987. [25] J. N. Babenezhad, "A rail-to-rail CMOS op amp," IEEE J. Solid-State Circuits, Vol. SC-23, pp. 1414-1417, Dec. 1988. [26] T. S. Fiez, H. C. Yang, J. J. Yand, C. Yu, and D. J. Allstot, "A family of high-swing CMOS operational amplifiers," IEEE J. Solid-State Circuits, Vol. SC-24, pp. 1683-1687, Dec. 1989. [27] M. D. Pardoen and M. G. Degrauwe, "A rail-to-rail input/output CMOS power amplifier," IEEE J. Solid-State Circuits, Vol. SC-25, pp. 501-504, Apr. 1990. [28] Ron Hogervorst, John P. Tero, Ruud G. H. Eschauzier, and Johan H. Huijsing, "A compact power-efficient 3V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries," IEEE J. Solid-State Circuits, Vol. 29, pp. 1505-1512, Dec. 1994. [29] R. Hogervorst, R. J. Wiegerink, P. A. L. de Jong, J. Fonderie, R. F. Wassenaar, J. H. Huijsing, "CMOS low-voltage operational amplifiers with constant-g rail-to-rail input stage," Analog Integrated Signal Processing, Vol. 5, pp. 135-146, 1994. [30] R. Hogervorst, and J. H. Huijsing. Design of low-voltage low-power operational amplifier cells: Kluwer Academic Publishers, 1996. [31] D. M. Monticelli, "A quad CMOS single-supply opamp with rail-to-rail output swing," IEEE J. Solid-State Circuits, Vol. SC-21, pp. 1026-1034, Dec. 1986. [32] J. N. Babenezhad, "A low-output-impedance fully differential Op amp with large output swing and continuous-time common-mode feedback," IEEE J. Solid-Stare Circuits, Vol. SC-26, pp. 1825-1833, Dec. 1991. [33] R. Hogervorst, J. P. Tero, R. G. H. Eschauzier, J. H. Huijsing, "A compact CMOS 3-V rail-to-rail input/output operational amplifiers for VLSI cell libraries," Digest of technical papers: 1994 IEEE International Solid-State Circuits Conference, pp. 244-245, Feb. 16-18, 1994. [34] R. Hogervorst, R. J. Wiegerink, P. A. L. de Jong, J. Fonderie, R. F. Wassenaar, J. H. Huijsing, "CMOS low-voltage operational amplifiers with constant- g rail-to-rail input stage," Proc. IEEE International Symposium on Circuit and Systems, San Diego. pp. 153-1861, May 10-13, Sept. 21-23 1992. [35] R. G. H. Eschauzier, R. Hogervorst, J. H. Huijsing, "A programmable 1.5 V CMOS class-AB operational amplifier with hybrid nested miller compensation for 120 dB gain and 6 MHz UGF," Digest of technical papers: 1994 IEEE International Solid-Slate Circuits Conference, pp. 246-247, Feb. 16-18, 1994. [36] Y. P. Tsividis. Operation and modeling of the MOS transistor." McGraw-Hill: New York 1987. [37] Satoshi Sakurai, Mohammed Ismail, "Robust design of rail-to-rail CMOS operational amplifiers for low power supply voltage," IEEE J. Solid-State Circuits, Vol. 31, No. 2, pp. 146-156, Feb. 1996. [38] L. Moldovan and H. H. Li, "A rail-to-rail, constant gain, buffered Op-Amp for real time video applications," IEEE J. Solid-State Circuits, Vol. 32, No. 2, pp. 169-176, Feb. 1997. [39] Rail-to-rail CMOS dual operational amplifier publish by ST Microelectronics. [40] J. H. Huijsing and D. Linbarger, "Low-voltage operation amplifier with rail-to-rail input and output ranges," IEEE J. Solid-State Circuits, Vol. SC-20, pp. 1144-1150, Dec. 1985. [41] P. R. Gray and R .G. Meyer. Analysis and design of analog integrated circuits: John Wiley & Sons, Inc. 1993.
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