(34.236.244.39) 您好!臺灣時間:2021/03/09 18:50
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果

詳目顯示:::

我願授權國圖
: 
twitterline
研究生:陳昱辰
研究生(外文):Yu-Chen Chen
論文名稱:低功率軌對軌運算放大器之研究
論文名稱(外文):A Low Power CMOS Rail-to-Rail Op-Amp
指導教授:洪西進洪西進引用關係
指導教授(外文):Shi-Jinn Horng
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電機工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:1999
畢業學年度:87
語文別:中文
論文頁數:65
中文關鍵詞:軌對軌運算放大器電導值增益頻寬積迴轉率抵補電壓共模輸入電壓範圍
外文關鍵詞:rail-to-railOp-Amptransconductancegainbandwith productslew rateoffset voltagecommon mode input voltage range
相關次數:
  • 被引用被引用:0
  • 點閱點閱:820
  • 評分評分:系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:1
在本文中,我們介紹了一種兩級、低消耗功率、且輸入和輸出的範圍均具有軌對軌的CMOS 運算放大器。利用 Huijsing 等人的想法 [30],我們設計的放大器可以工作在高頻率, 高直流增益和在軌對軌狀態時具有常數的電導值。本放大器的特性為即使外加供應電壓降至3V時,此放大器仍然能有效地工作。在外加供應電壓為3V、負載為10 、3pF的狀況下,此放大器仍然保持80dB以上的直流放大增益、且其增益頻寬積為6.68 MHz、迴轉率是 7.18 、抵補電壓為0.18mV。同樣的,此一放大器的增益頻寬積與功率消耗的比值為5.85 。若是在外加供應電壓為5V情況時,所有結果均比3V情況好。此外,此一放大器除了在輸出端具有軌對軌輸出外,在輸入端具有一不變電導值且具有軌對軌的共模輸入電壓範圍。 因此, 在本文所提出的電路將可以滿足各種應用的需求。

In this thesis, we present an efficient two-stage, compact, low- power CMOS operational amplifier with rail-to-rail input and output ranges. Inspired by Huijsing et. al.'s idea [30], this operational amplifier was designed to function at high frequency, high dc gain and rail-to-rail constant transconductance. Even though the supply voltage is down to 3V, it still can function properly and efficiently. For the 3V case, the dc gain of this Op-Amp is more than 80dB while driving 10 , and the unity-gain frequency is 6.68 MHz while driving 3pF. The slew-rate is 7.18 and the offset voltage is 0.18mV. Also this Op-Amp has a unity-gain frequency to power supply ratio of 5.85 for a capacitive load 3pF. For the 5V case, all results are better than those of 3V case. In addition to rail-to-rail output voltage swing, the Op-Amp has a constant g over the whole common-mode input voltage range. Therefore, the circuit presented in this thesis can be a wide range of requirements.

CHPATER 1 Introduction ………………………………… 1
1.1 Motivation ……………………………………………… 1
1.2 Contribution …………………………………………… 3
1.3 Outline ………………………………………………… 5
CHAPTER 2 Relative Survey and Background …………… 6
2.1 Background …………………………………………… 7
2.2.1 Gate Source Voltage ………………………………… 9
2.1.2 Signal Swing ………………………………………… 15
2.2 Relative Survey of Op-Amp Design Methodology…… 17
2.2.1 Input Stage ………………………………………… 18
2.2.2 Output Stage ………………………………………… 22
2.3 Conclusion …………………………………………… 25
CHPATER 3 Design Methodology ……………………… 27
3.1 Design Consideration………………………………… 27
3.2 Input Stage …………………………………………… 30
3.3 Circuit Description …...……………………………… 34
CHPATER 4 Simulation Results ………………………… 40
CHPATER 5 Summary and Future Work ………………… 55
5.1 Conclusion Summary ………………………………… 55
5.2 Future Work ………………………………………… 58
Reference ………………………………………………… 59
Appendix ………………………………………………… 65

[1] J. H. Huijsing and D. Linbarger, "Low-voltage operation amplifier with rail-to-rail input and output ranges," IEEE J. Solid-State Circuits, Vol. SC-20, pp. 1144-1150, Dec. 1985.
[2] T. Fiez et al., "A family of high swing CMOS operational amplifiers," IEEE J. Solid-State Circuits, Vol. 24, pp. 1683-1687, Dec. 1989.
[3] R. E. Vallee and E. I. El-Masry, "A very high frequency CMOS complementary folded cascode amplifier," IEEE J. Solid-State Circuits, Vol. SC-29, pp. 130-133, Feb. 1994.
[4] J. Lloyd and H. S. Lee, "A CMOS opamp with fully-differential gain enhancement," IEEE Trans. Circuit Syst-II, Vol. 41, pp.241-243, Mar. 1994.
[5] E. Sackinger and W. Guggenbuhl, "A high swing, high-impedance MOS cascode circuit," IEEE J. Solid-State Circuits, Vol. SC-25, pp. 289-297, Feb. 1990.
[6] D. J. Allstot, R. W. Brodersen, and P. R. Gray, "MOS switched capacitor ladder filters," IEEE J. Solid-State Circuits, Vol. SC-13, pp. 806-814, Dec. 1987.
[7] P. R. Gray and R. G. Meyer, "MOS operational amplifier design-a tutorial overview," IEEE J. Solid-State Circuits, Vol. SC-17, pp. 969-982, Dec. 1982.
[8] J. E. Solomon, "The monolithic op amp: a tutorial study," IEEE J. Solid-State Circuits, Vol. SC-9, pp. 314-332, Dec. 1974.
[9] Z. Y. Chang and Willy M. C. Sansen. Low-noise wide-band amplifiers in bipolar and CMOS technologies: Kluwer academic publishers, 1991.
[10] R. H. Dennard, F. H. Gaensslen, H. N. Yu, V. L. Rideout, E. Bassous, and A. R. LeBlanc, "Design of ion-implanted MOSFET's with very small physical dimensions," IEEE J. Solid-State Circuits, Vol. 9, pp. 256-268, Oct. 1974.
[11] J. E. Chung, M. C. Jeng, J. E. Moon, P. K. Ko, and C. Hu, "Performance and reliability design issue for deep-submicrometer MOSFET's," IEEE Transactions on Electron Devices, Vol. 38, pp. 545-554, Mar. 1991.
[12] C. Hu, S. C. Tam, F. C. Hsu, P. K. Ko, T. Y. Chan, and K. W. Terrill, "Hot-electron-induced MOSFET degradation-model, monitor, and improvement," IEEE Transactions on Electron Devices, Vol. ED-32, pp. 375-385, Feb. 1985.
[13] E. A. Vittoz, "The design of high-performance analog circuits on digital CMOS chips," IEEE J. Solid-State Circuits, Vol. 20, pp. 657-665, Jun. 1985.
[14] E. Sano, T. Tsukahara, and A. Iwata, "Performance limits of mixed analog/digital circuits with scaled MOSFET's," IEEE J. Solid-State Circuits, Vol. 23, pp. 942-949, Aug. 1988.
[15] S. Wong and C. A. T. Salama, "Impact of scaling on MOS analog performance," IEEE J. Solid-State Circuits, Vol. 18, pp. 106-114, Feb. 1983.
[16] T. Enomoto, T. Ishihara, M. Yasumoto, and T. Aizawa, "Design fabrication, and performance of scaled analog IC's," IEEE J. Solid-State Circuits, Vol. 18, pp. 395-402, Aug. 1983.
[17] C. G. Sodini, S. S. Wong, and P. K. Ko, "A framework to evaluate technology and device design enhancements for MOS integrated circuits," IEEE J. Solid-State Circuits, Vol. 24, pp. 118-127, Feb. 1989.
[18] P. Antognetti, G. Massobrio. Semiconductor device modeling with SPICE: McGraw-Hill book company, 1987.
[19] E. Seevinck, R. F. Wassenaar, "A versatile CMOS Linear transconductor/square-law circuit," IEEE J. Solid-State Circuits, Vol. 22, pp. 366-377, Jun. 1987.
[20] P. E. Alien and D. R. Holberg. CMOS analog circuit design: Oxford University Press, Inc., 1987.
[21] M. J. Fonderie, and J. H. Huijsing. Design of low-voltage bipolar operational amplifiers: Kluwer Academic Publishers, 1993.
[22] M. J. Fonderie, M. M. Maris and E. J. Schnitger, "l-V operational amplifrer with rail-to-rail input and output ranges," IEEE J. Solid-State Circuits, Vol. SC-24, pp. 1551-1559, Dec. 1989.
[23] J. A. Fisher and R. Koch, "A highly linear CMOS buffer amplifier," IEEE J. Solid-State Circuits, Vol. SC-22, pp. 330-334, Jun. 1987.
[24] M. Steyaert and W. Sansen, "A high-dynamic-range CMOS op amp with low distortion output structure," IEEE J. Solid-State Circuits, Vol. SC-22, pp. 1204-1207, Dec. 1987.
[25] J. N. Babenezhad, "A rail-to-rail CMOS op amp," IEEE J. Solid-State Circuits, Vol. SC-23, pp. 1414-1417, Dec. 1988.
[26] T. S. Fiez, H. C. Yang, J. J. Yand, C. Yu, and D. J. Allstot, "A family of high-swing CMOS operational amplifiers," IEEE J. Solid-State Circuits, Vol. SC-24, pp. 1683-1687, Dec. 1989.
[27] M. D. Pardoen and M. G. Degrauwe, "A rail-to-rail input/output CMOS power amplifier," IEEE J. Solid-State Circuits, Vol. SC-25, pp. 501-504, Apr. 1990.
[28] Ron Hogervorst, John P. Tero, Ruud G. H. Eschauzier, and Johan H. Huijsing, "A compact power-efficient 3V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries," IEEE J. Solid-State Circuits, Vol. 29, pp. 1505-1512, Dec. 1994.
[29] R. Hogervorst, R. J. Wiegerink, P. A. L. de Jong, J. Fonderie, R. F. Wassenaar, J. H. Huijsing, "CMOS low-voltage operational amplifiers with constant-g rail-to-rail input stage," Analog Integrated Signal Processing, Vol. 5, pp. 135-146, 1994.
[30] R. Hogervorst, and J. H. Huijsing. Design of low-voltage low-power operational amplifier cells: Kluwer Academic Publishers, 1996.
[31] D. M. Monticelli, "A quad CMOS single-supply opamp with rail-to-rail output swing," IEEE J. Solid-State Circuits, Vol. SC-21, pp. 1026-1034, Dec. 1986.
[32] J. N. Babenezhad, "A low-output-impedance fully differential Op amp with large output swing and continuous-time common-mode feedback," IEEE J. Solid-Stare Circuits, Vol. SC-26, pp. 1825-1833, Dec. 1991.
[33] R. Hogervorst, J. P. Tero, R. G. H. Eschauzier, J. H. Huijsing, "A compact CMOS 3-V rail-to-rail input/output operational amplifiers for VLSI cell libraries," Digest of technical papers: 1994 IEEE International Solid-State Circuits Conference, pp. 244-245, Feb. 16-18, 1994.
[34] R. Hogervorst, R. J. Wiegerink, P. A. L. de Jong, J. Fonderie, R. F. Wassenaar, J. H. Huijsing, "CMOS low-voltage operational amplifiers with constant- g rail-to-rail input stage," Proc. IEEE International Symposium on Circuit and Systems, San Diego. pp. 153-1861, May 10-13, Sept. 21-23 1992.
[35] R. G. H. Eschauzier, R. Hogervorst, J. H. Huijsing, "A programmable 1.5 V CMOS class-AB operational amplifier with hybrid nested miller compensation for 120 dB gain and 6 MHz UGF," Digest of technical papers: 1994 IEEE International Solid-Slate Circuits Conference, pp. 246-247, Feb. 16-18, 1994.
[36] Y. P. Tsividis. Operation and modeling of the MOS transistor." McGraw-Hill: New York 1987.
[37] Satoshi Sakurai, Mohammed Ismail, "Robust design of rail-to-rail CMOS operational amplifiers for low power supply voltage," IEEE J. Solid-State Circuits, Vol. 31, No. 2, pp. 146-156, Feb. 1996.
[38] L. Moldovan and H. H. Li, "A rail-to-rail, constant gain, buffered Op-Amp for real time video applications," IEEE J. Solid-State Circuits, Vol. 32, No. 2, pp. 169-176, Feb. 1997.
[39] Rail-to-rail CMOS dual operational amplifier publish by ST Microelectronics.
[40] J. H. Huijsing and D. Linbarger, "Low-voltage operation amplifier with rail-to-rail input and output ranges," IEEE J. Solid-State Circuits, Vol. SC-20, pp. 1144-1150, Dec. 1985.
[41] P. R. Gray and R .G. Meyer. Analysis and design of analog integrated circuits: John Wiley & Sons, Inc. 1993.

QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top
無相關期刊
 
系統版面圖檔 系統版面圖檔