臺灣博碩士論文加值系統

近年來功率半導體元件被廣泛的應用於工業、商業、住家、通訊、交通與電力等領域。在未來的數十年內，電力電子將朝向高電壓、大電流功率、及低切換模組等方向發展，並且朝向積體電路化。然而，在此領域一直為人所遺忘的靜電放電破壞(ESD)問題卻依然存在，甚至比一般低電壓製程之積體電路更脆弱，本論文將針對時下最熱門的液晶顯示器驅動功率晶體(TFT LCD Driver IC)來設計其靜電放電保護電路，使其能符合業界靜電放電破壞之標準。
論文中將提出四種針對汲極延伸金氧半場效電晶體(DEMOSFET) 所設計之靜電保護電路，其一為採用CMOS製程之矽控閘流體(SCR)來保護DEMOSFET之汲-源極，靠靜電放電事件中之高電壓，使p-n-p-n接面產生崩潰而發生Latch up，形成一極低阻抗之電流消散路徑；其二為改良原矽控閘流體(SCR) ，增加一複晶矽閘極(Poly Gate)與一高通RC濾波電路，以提升SCR之工作穩定性；其三為採用閘極耦合之方式，以汲極耦合至閘極之電位來誘發基板電流，使內部寄生之雙載子電晶體能在靜電放電事件中，提早被觸發導通，形成一低阻抗之靜電放電路徑。其四為結合一短通道閘極耦合金氧半場效電晶體(GCMOSFET)來保護DEMOSFET之閘極，利用第三項之原理並配合短通道元件導通快速之特性，針對閘極對高電壓與CDM (Charge Device Model) 高頻放電最敏感的弱點加以保護，再加以結合SCR或閘極耦合之方法來保護汲-源極，使DEMOSFET能獲得全方位之防護。

In recent years, power MOSFETs are widely used in many electric systems such as automatic electronics, power switching, power rectifier, and display driver. Two kinds of efficient ESD protection circuit design in lateral DEMOS(LDMOS) power transistor will be presented in this thesis.
One kind of the test samples fabricated by our design was using gate-coupled technique, which was well designed the overlap between the drain and the gate for optimum the gate potential transient corresponding to maximum substrate current generated by ESD pulse, meanwhile, it can subsequently lead to forward biasing of the substrate-source junction and then turn on the parasitic bipolar transistor.
Also, the other of the test samples were with an SCR structure, which is the most efficient of all protection devices in terms of ESD performance per unit area. Eventually, a SCR with polygate which will have a small trigger voltage under ESD event, and then it can obtain an efficient ESD protection.

第一章 緒論....................................1
1.1 靜電放電之影響..........................1
1.2 功率MOS元件之靜電問題...................2
1.3 本文題要................................3
第二章 靜電放電模型與測試方法..................4
2.1 人體放電模式(HBM).......................6
2.2 機器放電模式(MM)........................8
2.3 元件帶電模式(CDM).......................9
2.4 三種ESD模式之破壞機制..................10
2.5 測試方法...............................12
第三章 ESD保護電路之基本元件..................15
3.1 二極體(Diode...........................16
3.2 Bipolar電晶體..........................20
3.3 MOS電晶體..............................24
3.4 矽控閘流體(SCR)........................29
第四章 DEMOS功率元件之ESD保護電路設計.........34
4.1 GCMOS保護元件設計......................36
4.2 SCR保護元件設計........................46
4.3 完整DEMOS功率電晶體之ESD保護...........53
第五章 保護元件之ESD測試......................56
5.1 DEnMOS(100V，200V).....................56
5.2 GCDEnMOS(100V，200V)...................66
5.3 SCR....................................80
5.4 結果討論...............................89
第六章 結論...................................90

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