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研究生:涂崇斌
研究生(外文):Chorng-Bin Tu
論文名稱:堆疊式匣極快閃記憶體元件特性分析與研究
論文名稱(外文):Study and Analysis of Stacked-Gate Flash Memory Cells
指導教授:張勝良
指導教授(外文):Sheng-Lyang Jang
學位類別:碩士
校院名稱:國立臺灣科技大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2000
畢業學年度:88
語文別:英文
論文頁數:89
中文關鍵詞:快閃記憶體浮動閘極寫入抹除埋藏層通道表層通道通道福勒-諾德漢穿隧負基極偏壓效應
外文關鍵詞:Flashfloating gateprogrameraseburied channelsurface channelchannel Fowler-Nordheim tunnelingnegative substrate bias
相關次數:
  • 被引用被引用:0
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  • 收藏至我的研究室書目清單書目收藏:1
近來隨著快閃記憶體其價格的降低和性能的提升,已經在市場上激起新的興趣。大規模的應用也同時出現,如專門為數位相機、行動電話、掌上型電腦和其他手提設備而設計的小型可攜式記憶卡。由於能在電路內進行重覆程式化的優點,使它們成為符合經濟效益的一種元件。
本論文主要著重於物理上對於浮動閘極進行充/放電的電子傳遞過程的模擬與討論。我們將提出快閃記憶體元件操作的基本物理觀念,包含各種使用於寫入和抹除的不同機制。埋藏層通道式快閃記憶體元件的模擬結果將和表層通道式元件進行比較。
本論文也包含溫度對於快閃記憶體元件的影響。我們將模擬通道福勒-諾德漢穿隧式寫入/抹除與負基極偏壓效應並討論其特性。

Recently, lower price and increased performance of Flash memories have stirred new interest in the market. Meanwhile large-scale applications are emerging, e.g., small and portable memory cards designed for digital camera, cellular phone, palmtop PC and other handheld equipment. Their advantages is
the in-circuit reprogrammability, which leads to a cost effective device.
The focus of this thesis mainly includes simulation and discussion of physical electron-transport processes to charge/discharge the floating gate. Basic concepts and physics for the operation of Flash memory cells will be presented, and these include different mechanisms used in programming and erasing. Buried channel Flash memory cells also have been simulated to be compared with surface channel ones.
Temperature dependent characteristics of Flash memory cells is also studied. Channel Fowler-Nordheim tunneling program/erase and negative substrate bias (NSB) effect will be simulated and followed by discussions on their characteristics

Abstract
Acknowledgement (In Chinese)
1 Introduction
2 Operation Mechanisms and Characteristics of Surface Channel Stacked-Gate Flash Memory Cells
2.1Introduction..............................................5
2.2 Basic I-V Characteristics ...............................9
2.3 Channel-Hot-Electron (CHE) Injection Program ...........16
2.4 Source-Side Fowler-Nordheim Tunneling (SFN) Erase ......23
2.5 Temperature Effect on Program/Erase Characteristics ....27
2.6 Conclusion..............................................37
3 Operation Mechanisms and Characteristics of Buried Channel Stacked-Gate Flash Memory Cells 3.1 Introduction............................................38
3.2 Basic I-V Characteristics...............................39
3.3 Characteristics Comparison between Surface- and Buried-Channel Flash Memory Cells .................... 45
3.4 Conclusion..............................................64
4 Simulation of Channel Fowler-Nordheim Tunneling Program and Erase, and Negative Substrate Bias Effect 4.1 Introduction............................................65
4.2 Channel Fowler-Nordheim Tunneling Program...............67 4.3 Channel Fowler-Nordheim Tunneling Erase ................73
4.4 Negative Substrate Bias Effect..........................78
4.5 Conclusion..............................................84

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