臺灣博碩士論文加值系統

從十多年前無線行動通訊系統開始提供服務以來，行動電話無遠弗屆的便利性，已經漸漸改變了人們的生活方式，如今，行動通訊即將邁入新的紀元，以提供高品質的語音通訊、高速率的數據傳輸、動態影像以及多媒體服務為其目標，所以可以肯定的是，第三代無線通訊技術將成為全球熱血澎湃的明星產業，而行動電話則是其中的要角，帶領人們走向“有聲有色”的行動通訊生活。
目前的行動電話內部普遍都採用數位信號處理器(DSP)，因它運算反應比微處理器快，又沒有類比電路會失真的缺點，所以適合應用在音訊領域的合成、辨識與編碼方面。而第三代行動電話的應用比現有第二代行動電話(GSM)廣泛許多，凡舉影像、語音的標準也更複雜，因此數位信號處理器效能已成邁入第三代行動通訊的關鍵所在。
本篇論文探討應用於第三代行動通訊系統之下鏈初始基地台搜尋系統設計與數位信號處理器實現。主要針對歐洲電信標準制定協會(ETSI)和其他標準組織所共同主導的第三代行動通訊合作計畫3GPP(The Third Generation Partnership Project)，寬頻分碼多工系統(W-CDMA)中的初始基地台搜尋(Initial Cell Search)，在效能和複雜度的考量下，提出一新的架構並且用Spectrum所出的Daytona PCI數位信號處理模組來實現。

Wireless communications have become more and more pervasive in our modern lives. The telecommunications world is changing as multi-media, Internet Protocol (IP) technologies and mobile communications converges. Significant changes will be brought about by this rapid evolution in technology, especially with the advent of third generation (3G) mobile Internet technology. The mobile phone will be used as an integral part of the majority of people’s lives- it will not only be an added accessory but a core part of how they conduct their daily lives. The mobile phone will become akin to a remote control or magic wand that lets people do what they want when they want.
3G services require an increased data rate, which imposes increased demands on digital signal processors (DSPs) for implementing signal-processing functions such as modulation/demodulation, channel coding/decoding and compression/decompression. High-performance DSP is one of the key technologies in the implementation of the emerging 3G system.
This thesis investigates the algorithm design and DSP realization of initial cell search for the 3GPP WCDMA system. A new algorithm is proposed with emphases on the possible of performance/complexity trade-offs and the effects of finite-word length. In addition, the proposed synchronization system is implemented with the Daytona PCI board, which is a product from Spectrum Signal Processing Corporation.

第一章 簡介………………………………………………………………………1
1.1 通訊系統的演進 …………………………………………………………...1
1.2 論文概略 ……………………………………………………………………2
1.3 論文章節 ……………………………………………………………………3
第二章 背景知識與相關研究 ……………………………………………………4
2.1 3GPP的規格 ………………………………………………………………..4
2.1.1 3GPP的層級介紹 …………………………………………………….4
2.1.2 3GPP的通道介紹 …………………………………………………….5
2.1.3 3GPP的下鏈同步通道介紹 ………………………………………….9
2.1.3.1 首要同步通道 …………………………………………………….. 10
2.1.3.2 次要同步通道 …………………………………………………….. 10
2.1.3.3 通用領航通道 …………………………………………………….. 10
2.2 同步碼分類與目的 ………………………………………………………… 13
2.2.1 首要同步碼 ……………………………………………………………. 13
2.2.1.1 階層架構 ………………………………………………………….. 14
2.2.1.2 葛雷碼架構 ……………………………………………………….. 16
2.2.1.3 一般階層化葛雷碼架構 ………………………………………….. 18
2.2.2 次要同步碼 ……………………………………………………………. 19
2.2.3 群組判定碼 ……………………………………………………………. 20
2.3 同步碼性能模擬 …………………………………………………………… 21
第三章 系統架構與設計原理 ……………………………………………………. 25
3.1 通道格式 …………………………………………………………………… 25
3.2 同步接收機 ………………………………………………………………… 25
3.2.1 第一階段接收機架構 …………………………………………………. 27
3.2.2 第二階段接收機架構 …………………………………………………. 28
3.2.3 第三階段接收機架構 …………………………………………………. 29
3.3 基地台搜尋策略 …………………………………………………………… 32
3.3.1 串列搜尋 ………………………………………………………………. 32
3.3.2 並列搜尋 ………………………………………………………………. 32
3.3.3 改良式並列搜尋 ………………………………………………………. 33
第四章 數位信號處理器實現 ……………………………………………………. 36
4.1 Daytona PCI板的硬體介紹 ……………………………………………… 36
4.1.1 處理器擴充模組(PEM) ………………………………………………. 38
4.1.2 PMC介面 …………………………………………………………….. 39
4.1.3 DSP~Link3介面 ……………………………………………………... 39
4.1.4 TMS320C6701處理器架構 …………………………………………. 40
4.1.4.1 中央處理單元 …………………………………………………….. 42
4.1.4.2 記憶體配置 ……………………………………………………….. 43
4.1.4.3 內部周邊裝置 …………………………………………………….. 46
4.2 數位信號處理器軟體發展環境 …………………………………………… 47
4.3 有限字元長度效應 ………………………………………………………… 48
4.3.1 浮點和定點型式表示法 ………………………………………………. 48
4.3.2 有限字元長度效應所引發的問題 ……………………………………. 49
4.3.3 有限字元長度效應的探討 ……………………………………………. 49
4.3.3.1 動態範圍 ………………………………………………………….. 50
4.3.3.2 類比數位轉換器所需位元數 …………………………………….. 50
第五章模擬結果和硬體實現 …………………………………………………... 51
5.1 三階段搜尋架構模擬結果 ………………………………………………… 51
5.1.1 各階段模擬結果 ………………………………………………………. 52
5.1.2 基地台搜尋策略結果比較 ……………………………………………. 53
5.2 有限字元長度效應模擬結果 ……………………………………………… 54
5.3 數位信號處理器實作結果 ………………………………………………… 55
第六章結論與未來展望 ………………………………………………………... 58
6.1 結論 ………………………………………………………………………… 58
6.2 未來展望 …………………………………………………………………… 59
第七章 參考文獻 …………………………………………………………………. 61
附錄一 類比/數位轉換程式 ……………………………………………………… 75

[1]3G TS 25.301 Radio Interface Protocol Architecture v3.4.0.
[2]3G TS 25.211 Physical Channels and Mapping of Transport Channels onto Physical Channels v3.3.0.
[3]3G TS 25.211 The Characteristics of The Layer 1 Transport Channels and Physicals Channels in The FDD Mode of UTRA v3.3.0.
[4]3G TS 25.213 Spreading and Modulation for UTRA Physical Layer FDD Mode v3.3.0.
[5]3G TS 25.214 The Characteristics of The Physicals Layer Procedures in The FDD Mode of UTRA v3.3.0 Annex C.
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[7]3G TS 25.213 Spreading and Modulation for UTRA Physical Layer FDD Mode v3.3.0 5.2.3.1.
[8]3G TS 25.213 Spreading and Modulation for UTRA Physical Layer FDD Mode v3.3.0 5.2.3.2.
[9]3G TS 25.213 Spreading and Modulation for UTRA Physical Layer FDD Mode v3.3.0 Annex A.
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