臺灣博碩士論文加值系統

本論文中我們提出了三種不同的並行處理器架構，以高速偵測影像上大致具有對稱性或構成圖形的線條無複雜連接及交錯的圖形。 在第一種設計中，我們採用預先儲存圖形樣版的方式並配合多處理機架構以偵測圖形軌跡上的邊緣點數目；第二種設計中，我們提出使用一種新的格狀陣列處理器的偵測方法並配合廣播的方式，可快速傳播邊緣點資訊；在最後一種設計裡面，我們簡化了上一個設計中的處理器單元，使得應用層面更為廣泛。
在我們的設計中，每一個處理器單元都簡化到僅需要一個加法器或比較器，因此在硬體設計上非常簡易，也正因為如此，所以在時間效率上的表現也非常傑出。

In this thesis, we put forward three different kinds of parallel processing architectures. As to the high-speed image detection, generally, there are either symmetric figures or those without complicated designs; e.g., designs whose figures comprise shapes such as circles, diamonds, triangles, etc. In the first design, we detect the number of the edge points at the round locus by adopting the method of pre-storing the image templates and working with the multi-processor architecture. In the second design, we demonstrate our ability to quickly spread the information at the edge points by employing a new detection method from the mesh-connected processor, and by working in broadcasting. Simplifying the processor element of the former design, we can enjoy wider aspect of application in the final design.
In our designs, each processor element has been simplified so that only one adder or one comparator is required, consequently, easing modification it would be considerably easy. Time efficiency is considerably improved.

目 錄：
中文摘要 Ⅰ
英文摘要 Ⅱ
目錄 Ⅲ
圖目錄 Ⅴ
第一章 簡介………..………………………………………….1
第二章 處理赫夫轉換圓偵測的多處理機設計……………………5
2.1 赫夫轉換的演算法……………………………………….5
2.2 以赫夫轉換為基礎的圓偵測多處理機設計…………….6
第三章 圓圖形比對的多處理機系設計…………….………..12
3.1 基本的硬體架構…………………………………..…….13
3.2 階層式加法器及臨界值電路…………………..……….15
3.3 動態臨界值演算法…………………………………..….18
3.4 新設計之圓偵測並行處理機……………………..…….22
第四章 植入影像陣列的圖形比對及其感測硬體設計…....26
4.1 格狀(Mesh-connected)陣列處理器架構模型………...26
4.2 影像的移動及輸入方法………………………………...29
4.3 格狀陣列處理器的內部構造………………………..….32
4.4 改變連接方式的格狀陣列處理機……………………...37
第五章 植入影像陣列的圖形比對及其感測硬體設…..…..43
5.1 直接硬體連線方式之原理……………………………...43
5.2 使用直接硬體連線方式………………………………...45
第6章 優越性分析…………………………...…………………..49
第七章 結論……………………..…………………………………57
參考文獻

參考文獻
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