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研究生:蕭振安
研究生(外文):Chen-An Hsiao
論文名稱:覆晶構裝在熱循環負載作用下對疲勞壽命之分析與探討
論文名稱(外文):The Analysis on the Fatigue Life of Flip Chip Package Under Cyclic Thermomechanical Loading
指導教授:鍾文仁鍾文仁引用關係
指導教授(外文):Wen-Ren Jong
學位類別:碩士
校院名稱:中原大學
系所名稱:機械工程研究所
學門:工程學門
學類:機械工程學類
論文種類:學術論文
論文出版年:2001
畢業學年度:89
語文別:英文
論文頁數:131
中文關鍵詞:覆晶構裝錫球疲勞
外文關鍵詞:Flip ChipSolder BumpFatigue
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  • 被引用被引用:2
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半導體元件有日益縮小的趨勢,傳統有腳架的構裝方式,也轉變成利用銲球來連接晶片與基材的構裝方法。可靠度對於產品的使用壽命來說是一項非常重要的指標,軟銲接點雖有其優點,但也由於材料及界面的複雜,為了增加構裝的可靠性,有必要對於銲球之熱傳及熱應力分析加以探討,以提供設計及製造之參考。
本文針對覆晶構裝體在環境溫度循環負載之下,利用ANSYS有限元素分析軟體模擬覆晶構裝結構體之熱及機械行為。結果顯示,由於受元件間材料性質差異之影響,使構裝體產生變形。就錫球部分而言,最大應力、應變,亦即最大等效塑性應變範圍值,均發生在離模型中心對稱面最遠處,也是最容易造成疲勞破壞處,並進一步做疲勞分析。
由本文研究結果顯示,由於受到構裝元件材料性質差異之影響,使構裝體最外側錫球與晶片接合面處,會造成疲勞破壞。並針對不同的循環數、不同的材質、不同的製程下,分別以疲勞-應力方法以及疲勞-應變方法計算其壽命。此外,在分析錫球之疲勞壽命時,發現選用3-D模型較2-D模型分析準確。
The components of semiconductor show a tendency of being contracted day by day. The packaging technology with pins is substituted by the solder balls for connecting chips and substrate. The reliability is a very important index for the using-life of products. Although the solder contact has many advantages, its material and interface are complicated. To increase the reliability of packaging, the analyses of the thermal conduction and the thermal stress of solder balls are indispensable to provide references for design and manufacture.
This paper focuses on the fatigue failure of the flip chip package under the cyclic loading at ambient temperature. The ANSYS is used to simulate the thermal loading and the mechanical behavior of flip chip package. The results reveal that the deflection is caused by the difference of material properties of the components. For example, the maximum equivalent plastic strain of solder balls always happens at the farthest place from the symmetrical surface of models and causes the fatigue failure.
From the results of this study, the different materials of components will result in fatigue failure, which occurs on the connecting surface between the most external solder bump and the chip. Moreover, the fatigue-stress method and fatigue-strain method are used to calculate the fatigue life of different cycles, different materials and different processes respectively. Additionally, the results of 3-D model are more accurate than the results of 2-D model when analyzing the fatigue life of solder bumps.
CHINESE ABSTRACT...............................................................I
ABSTRACT......................................................................II
ACKNOWLEDGEMENT..............................................................III
TABLE OF CONTENTS.............................................................IV
LIST OF TABLES...............................................................VII
LIST OF FIGURES.............................................................VIII
CHINESE ABSTRACT OF EACH CHAPTER...........................................XVIII
CHAPTER 1. INTRODUCTION........................................................1
1-1 Preface..................................................................1
1-2 Research Background......................................................3
1-3 Purpose and Method.......................................................4
1-4 Reference Review.........................................................5
1-5 Content Frame............................................................6
CHAPTER 2. FLIP CHIP ASSEMBLY AND
FUNDAMENTAL THEORY OF ANALYSIS...............................................7
2-1 Introduction of Flip Chip Assembly.......................................7
2-1-1 Bonding Process......................................................9
2-1-2 Underfill Process...................................................11
2-2 The Fundamental Theory of Analysis......................................11
2-2-1 The Theory of Thermal Conduction....................................11
2-2-2 The Material Non-linearities........................................13
2-2-3 Solutions of Non-linear Problem.....................................19
CHAPTER 3. THEORY OF FATIGUE..................................................25
3-1 Physical Phenomenon of Fatigue..........................................25
3-2 The Fatigue Life of Solder Ball.........................................25
3-3 Fatigue Theorem of Solder Ball..........................................26
3-3-1 Creep...............................................................26
3-3-2 Fatigue-Stress Method...............................................32
3-3-3 Fatigue-Strain Method...............................................35
CHAPTER 4. SIMULATION OF THE CAE SOFTWARE.....................................37
4-1 Introduction............................................................37
4-2 Introduction to the Basic Operating Principle of ANSYS..................37
4-2-1 Preprocessor........................................................38
4-2-2 Solution............................................................42
4-2-3 Postprocessor.......................................................45
4-3 Difficulty in CAE Simulation............................................47
CHAPTER 5. HYPOTHESES OF THE MODEL AND
ANALYSIS METHOD.............................................................49
5-1 Hypotheses of the Model.................................................49
5-1-1 Basic Assumptions...................................................49
5-1-2 Models of the Flip Chip Package.....................................50
5-1-3 The Loading and the Boundary Conditions.............................55
5-2 Methods of Analysis.....................................................57
5-2-1 Study Items.........................................................58
5-2-2 The Analytic Setting................................................59
CHAPTER 6. RESULTS AND DISCUSSIOUS............................................68
6-1 The Comparison among Three Different Cycles.............................68
6-1-1 The Thermal Analyses................................................68
6-1-2 The Structural Analysis.............................................73
6-2 The Comparison between Two Materials of the Solder
Bump....................................................................89
6-2-1 The Thermal Analyses................................................90
6-2-2 The Structural Analysis.............................................93
6-3 The Influences on the Flip Chip Package with and
without the Underfill...................................................99
6-4 Analysis and Comparison of the 3-D Strip with the
2-D Model..............................................................104
6-4-1 The Equivalent Stress..............................................105
6-4-2 The Equivalent Strain..............................................109
6-4-3 The Fatigue Life...................................................113
6-5 The Proof of the Quarter Model and the Full Model......................114
CHAPTER 7. CONCLUSIONS AND FUTURE WORK.......................................124
7-1 Conclusions............................................................124
7-2 The Future Work........................................................125
REFERENCES...................................................................127
VITA.........................................................................131
1.C. P. Yeh, W. X. Zhou, K. Wyatt, “Parametric Finite Element Analysis of Flip Chip Reliability”, The International Society for Hybrid Microelectronics, Vol.19, No.2, pp.120-127, 1996.2.J. H. Lau, Yi-Hsin Pao, “Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies”, McGraw-Hill Book Companies, Inc., New York, 1997.3.J. Wang, Z. Qian, D. Zou, S. Liu, “Creep Behavior of a Flip-Chip Package by Both Fem Modeling and Real Time Moiré Interferometry”, Transactions of the ASME Journal of Electronic Packaging, Vol.120, pp.179-185, 1998.4.E. Madenci, S. Shkarayev, R. Mahajan, “Potential Failure Sites in a Flip- Chip Package With and Without Underfill”, Transactions of the ASME Journal of Electronic Packaging, Vol.120, pp.336-341, 1998.5.G. T. Joo, “Parametric Finite Element Analysis of Solder Joint Reliability of Flip Chip On Board”, IEEE/CPMT Electronics Packaging Technology Conference, pp.57-62, 1998.6.K. H. Teo, “Reliability Assessment of Flip Chip on Board Connection”, IEEE/CPMT Electronics Packaging Technology Conference, pp.269-273, 1998.7.Q. Yao, J. Qu, “Three-Dimension Versus Two-Dimension Finite Element Modeling of Flip-Chip Packages”, Transactions on ASME Journal of Electronic Packaging, Vol.121, pp.196-201, 1999.8.K. Darbha, J. H. Okura, S. Shetty, A. Dasgupta, “Thermomechanical Durability Analysis of Flip Chip Solder Interconnects:Part 1-Without Underfill”, Transactions on ASME Journal of Electronic Packaging, Vol.121, pp.231-236, 1999.9.K. Darbha, J. H. Okura, S. Shetty, A. Dasgupta, “Thermomechanical Durability Analysis of Flip Chip Solder Interconnects:Part 2-With Underfill”, Transactions on ASME Journal of Electronic Packaging, Vol.121, pp.237-241, 1999.10.J. P. Holman, “Heat Transfer”, McGraw-Hill Book Companies, Inc., New York, 1996.11.ANSYS Menu, “ANSYS Structural Nonlinearities User’s Guide Volume Ⅰ”, Swanson Analysis System, Inc., 2000.12.ANSYS Menu, “ANSYS Structural Nonlinearities User’s Guide Volume Ⅱ”, Swanson Analysis System, Inc., 2000.13.N. E. Dowling, “Mechanical Behavior of Materials”, Prentice-Hall, Inc., 1993.14.J. N. Reddy, “An Introduction to The Finite Element Method”, McGraw-Hill, Inc., New York, 1993.15.S. J. Chu, “Mechanics of Materials”, Tung-Hua Publishing Company, Taiwan, Apr. 1982.16.S. Knecht, L. R. Fox,“Constitutive Relation and Creep-Fatigue Life Model for Eutectic Tin-Lead Solder”, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol.13, No.2, pp.424-433, Jun. 1990.17.P. R. Lavery, “An investigation of the thermal and mechanical properties of high lead-low tin alloy solders”, M.S. thesis, Darmouth College, Hanover, NG, 1987.18.S. Knecht, L. R. Fox, “Integrated Matrix Creep:Application to Accelerated Testing and Lifetime Prediction”, in Solder Joint Reliability: Theory and Applications, New York, 1991.19.S. Michaelides, S. K. Sitaraman, “Effect of Material and Geometry Parameters on the Thermo-Mechanical Reliability of Flip-Chip Assembles”, Inter-Society Conference on Thermal Phenomena, pp.193-200, 1998.20.D. Grivas, K. L. Murty, J. W. Morris, “Deformation of Pb-Sn Eutectic Alloys at Relatively High Strain Rates”, Acta Metal. Vol.27, pp.731-733, 1979.21.H. D. Solomon, “Low-Cycle Fatigue of 60Sn/40Pb Solder”, ASTM Special Technical Publication, Philadelphia, PA, USA, pp.342-370, 1985.22.B. Wong, D. E. Helling, R. W. Clark, “A Creep-Rupture Model for Two-Phase Eutectic Solders”, IEEE Trans. Comp. Hybrids, Manuf. Technol., Vol.11, pp.284-290, Sep. 1998.23.Y. H. Pao, “A Fracture Mechanics Approach to Thermal Fatigue Life Prediction of Solder Joints”, IEEE Transactions on Components, Hybrids, and Manufacturing Technology, Vol.15, No.4, pp.559-570, Jun. 1992.24.S. R. Bodner, “Review of A Unified Elastic-Viscoplastic Theory”, in Unified Constitutive Equations for Creep and Plasticity, Elsevier Applied Science, London, pp.273-301, 1987.25.I. R. Holub, J. M. Pitarresi, T. J. Singler, “Effect of Solder Joint Geometry on the Predicted Fatigue Life of BGA Solder Joints”, Inter-Society Conference on Thermal Phenomena, pp.187-194, 1996.26.S. Manjula, S. K. Sitaraman, “Effect of out-of-plane Material Behavior on in-plane Modeling”, Itherm, 1998.27.R. S. Murphy, S. K. Sitaraman, “Two and Three-dimensional Modeling of VSPA Butt Solder Joints”, Proc. Electron. Compon. Techonl. Conf., IEEE Piscataway, NJ, USA, pp.472-478, 1997.28.Y. J. Chang, C. H. Hsu,“Application of CAE Technique for IC Packaging Process”, CAD and Automation Magazine, pp.40-45, Apr. 1996.29.L. S. Turng, “Computer-Aided Engineering (CAE) for the Microelectronic Packaging Process”, ASME Advances in Computer-Aided Engineering (CAE) of Polymer Processing, MD-Vol.49/HTD-Vol.283, pp.191-208, 1994.30.Y. L. Lai, C. H. Lin, C. Y. Hsieh,“ANSYS Computer-Aided Analysis-User’s Guide”, Ju-Lin Publishing Company, Taiwan, May 1997.31.R. H. Katyl, W. T. Pimbley, “Shape and Force Relationships for Molten Axisymmetric Solder Connections”, Transactions of the ASME Journal of Electronic Packaging, Vol.114, pp.336-341, Sep. 1992.32.J. S. Hwang, “Solder Paste in Electronics Packaging”, Van Nostrand Reinhold, New York, 1992.33.B. Z. Hong, L. S. Su, “On Thermal Stresses and Reliability of A PBGA Chip Scale Package”, IEEE Proceedings of ETCT, pp.503-510, 1998.34.J. Wang, Z. Qian, D. Zou, S. Liu, “Process Induced Stresses of A Flip-Chip Packaging by Sequential Processing ModelingTechnique”, Transactions of the ASME Journal of Electronic Packaging, Vol.120, pp.309-313, Sep. 1998.35.C. L. Chen, “The Effect and Analysis of Solder Joint Geometry on the Fatigue Life of PBGA Packaging”, Master Thesis, Chung Yuan Christian University, Taiwan, Jun. 2000.
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