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研究生:郭書賢
研究生(外文):Shu-Xian Guo
論文名稱:應用於TDMA/FDD行動台之新架構收發機放大器模組之設計與製作
論文名稱(外文):Design and Implementation of a New Transceiver Amplifier Module for TDMA/FDD Mobile Station
指導教授:何滿龍何滿龍引用關係
指導教授(外文):Man-Long Her
學位類別:碩士
校院名稱:逢甲大學
系所名稱:電子工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2001
畢業學年度:89
語文別:英文
論文頁數:121
中文關鍵詞:射頻前端分時多重存接分頻雙工
外文關鍵詞:RF front-endFDMATDD
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本論文主要為研製一個適用於分時多重存接(Time-Division Multiple Access, TDMA)與分頻雙工(Frequency-Division Duplexing, FDD)系統之新架構射頻前端放大器模組。不同於傳統射頻前端之信號發射與接收路徑,本研究利用創新設計之縮小型功率結合器(Power Combiner)並結合寬頻低雜訊放大器(Wideband LNA),將接收機之低雜訊增益級放大器(LNA Gain-stage)與發射機功率放大器之增益級放大器(Gain-stage Amplifier)結合為一,藉此以降低成本、功率消耗及提高收發機系統的靈敏度。電路製作採用Hybrid MIC方式來驗證,研製電路包含功率放大器(Power Amplifier, PA)、低雜訊放大器(Low Noise Amplifier, LNA)、寬頻低雜訊放大器(Wideband LNA)、及功率分配器(Power Divider)。
電路製作規格採用DCS1800系統行動台電路標準,上鏈路(Uplink)頻帶為1710 ~ 1785 MHz,下鏈路(Downlink)頻帶為1805 ~ 1880 MHz。設計接收路徑電路時,需注意的重要類比規格為:雜訊指數(Noise Figure, NF)、各埠間之隔離度(Isolation)、轉換增益(Transducer Gain);而在設計發射路徑電路時,需注意的重要規格為:輸出功率(Output Power)、線性度(linearity)、功率增加效率(Power-Added Efficiency, PAE)、轉換增益(Transducer Gain)等。
研究重點主要為探討縮小化之Power Divider架構分析與設計,以及各次電路架構之研製,經由射頻電路模擬軟體(CAD software)計算來獲得最佳化之電路特性。最後做次電路之整合製作,並利用HP4432B與HP89441A做GMSK(Gaussian Minimum Shift Keying)數位調變訊號的EVM(Error Vector Magnitude)量測,最後與傳統射頻前端架構做特性的比較,並評估其創新架構的可行性。

The purpose of this research is to design and implement a new transceiver amplifier module applied to time-division multiple access (TDMA) and frequency-division duplexing (FDD) system. Far from the traditional radio frequency (RF) front-end signals transmitting and receiving paths, we replaced the second stage of low noise amplifier (LNA) in receiving path and a pre-amplifier for power amplifier (PA) in transmitting path with one-stage wideband low noise gain stage by using a new modified reduced-size power combiner and band-select filter or a duplexer. In this new structure, we can reduce the cost of RF transceiver amplifier module and power consumption of the system. Module circuits are implemented by a hybrid microwave integrated circuit (MIC).
The sub-circuits we designed and implemented in this research include power amplifier, low noise amplifier, wideband LNA, and power divider. The sub-circuits are designed to follow the DCS1800 mobile station standard. The uplink band is 1710 to 1785 MHz, and the downlink band is 1805 to 1880 MHz. The prime concern specifications in receiving path are noise figure (NF), isolation between uplink and downlink signal ports and transducer gain. The important specifications in transmission path are output power, linearity, power-added efficiency (PAE) and transducer gain.
The criteria of this study are to design and analyze a new modified reduced-size power divider structure, and implement the passive and active sub-circuits. Circuits are designed by using RF computer-aided software (CAD) to predict the optimum performance. Finally, we measure the error vector magnitude (EVM) of the new RF front-end architecture by HP4432B ESG and HP89441A vector signal analyzer. To follow the DCS1800 standard, we use the Gaussian minimum shift keying (GMSK) modulation signal to test the new transceiver amplifier module performances. Furthermore, we compare and discuss the performances between the conventional and the new transceiver amplifier module architectures.

CHINESE ABSTRACTi
ABSTRACTiii
ACKNOWLEDGEMENTSv
TABLE OF CONTENTSvi
LIST OF TABLESviii
LIST OF FIGURESix
LIST OF ABBREVIATIONSxiii
1INTRODUCTION TO WIRELESS SYSTEM1
1.1Generic RF Front-end Architecture2
1.1.1Receiver Considerations2
1.1.2Transmitter Considerations4
1.2TDMA/FDD Techniques and DCS1800 standard4
1.2.1Time and Frequency-Division Duplexing5
1.2.2Time-Division Multiple Access5
1.2.3DCS1800 standard7
2THE DESIGN OF THE NEW TRANSCEIVER AMPLIFIER MODULE9
2.1Considerations in Receiving Path10
2.2Considerations in Transmitting Path12
3A MODIFIED REDUCE-SIZE POWER DIVIDER DESIGN AND IMPLEMENTATION14
3.1The Concept of Conventional Wilkinson Power Divider14
3.2Power Divider Design by Using Lumped Elements21
3.3The Implementation of A Modified Reduce-size Power Divider22
4AMPLIFIERS DESIGN AND IMPLEMENTATION APPLIED TO THE NEW TRANSCEIVER AMPLIFIER MODULE28
4.1Low-Noise Amplifier29
4.1.1LNA Considerations29
4.1.2Implementation and Measurement Results31
4.2Wideband Amplifier44
4.2.1Wideband Amplifier Considerations44
4.2.2Implementation and Measurement Results45
4.3Power Amplifier50
4.3.1PA Considerations50
4.3.2Implementation and Measurement Results53
5THE NEW TRANSCEIVER AMPLIFIER MODULE INTEGRATION AND PERFORMANCE MEASUREMENT58
5.1Analog Carrier Signal Measurement Results64
5.2Modulation Signal Measurement Results67
6CONCLUSION74
7REFERENCE76
8APPENDIXES78
A.Paper Published in PIERS 200078
B.Paper Published in Cross Strait Tri-regional Radio Science and Wireless Technology Conference90
C.Paper Published in Proceeding of the Fifth Symposium on Computer and Communication Technology103
D.MMIC Design in Chip Implementation Center108
E.Implementation of 1.75 GHz Frequency Synthesizer for NSC Project114

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