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研究生:孫有民
研究生(外文):You-Min Sun
論文名稱:互補型金氧半可程控工作放大器
論文名稱(外文):A CMOS Programmable Operational Amplifier
指導教授:劉紹宗
指導教授(外文):Ph. Patrick S. Liu
學位類別:碩士
校院名稱:逢甲大學
系所名稱:電機工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2001
畢業學年度:89
語文別:中文
論文頁數:69
中文關鍵詞:可程控工作放大器迴轉率偏壓選擇功率消耗
外文關鍵詞:Programmable operational amplifierSlew rateBias selectPower dissipation
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本論文旨在設計一個金氧半場效體可程控工作放大器。在論文中提出的放大器能夠由外部以3-bit的數位訊號程控的偏壓電壓,藉以控制放大器驅動負載的能力[1][2]。此電路設計的觀念建立於改變工作放大器中電流鏡提供的偏壓電流。利用這個電路的特性,迴轉率能受到控制且功率的消耗也能加以改善。
此放大器選用聯電0.5微米、兩層poly、兩層metal、n型井、CMOS製程。其特色在於偏壓選擇,允許元件能隨著不同的供應電流程控著,而且表現出不同的交流特性。供應的電流被設定在52μA, 237μA, 或是 696μA,迴轉率則呈現於0.163V/μs與7.94V/μs之間。
此放大器提出的偏壓選擇,允許使用者依照所需的特性任意的選擇三種偏壓等級。各個等級的取捨包括了交流特性和功率消耗。在高偏壓模式時,放大器有著低輸入電壓偏移量、高輸入阻抗、以及較高的迴轉率,但是需要消耗較多的功率。在中偏壓模式時,放大器有著低輸入電壓偏移量、高輸入阻抗、中庸的特性表現。在低偏壓模式時,放大器有著低輸入電壓偏移量、高輸入阻抗、極小的功率消耗、高差動增益。

This thesis presents the design of a CMOS programmable operational amplifier. The amplifier proposed in this thesis is capable of providing a programmable extra bias voltage that can be linearly controlled by an external 3-bit digital signal[1][2]. The circuit designed is based upon a concept, which changes the bias current from the current mirror of an operational amplifier. By utilizing the designed circuit, slew rate can be controlled and power dissipation can be optimized.
The designed amplifier is fabricated by UMC 0.5mm double-poly double-metal N-well CMOS process. The amplifier offers a bias-select feature, which allows the device to be programmed with a wide range of different supply currents and therefore different levels of ac performance. The supply current can be set at 52μA, 237μA, or 696μA, which results in slew rate specification between 0.163V/μs and 7.94V/μs.
The operational amplifier offers a bias-select feature that allows the user to select any one of three bias leaves depending on the levels of performance desired. The tradeoffs between bias levels involve ac performance and power dissipation. In the high bias mode, the OP features low input offset voltage, high input impedance, and higher slew rate. But it need more power dissipation. In the medium bias mode, the OP features low input offset voltage, high input impedance, and medium values of all performance. In the low bias mode, the OP features low input offset voltage, high input impedance, extremely low power consumption, and high differential voltage gain.

中文摘要…………………………………………………………………i
英文摘要…………………………………………………………………iii
誌謝………………………………………………………………………v
目錄………………………………………………………………………vi
圖目錄……………………………………………………………………viii
表目錄……………………………………………………………………xi
縮寫及符號對照表……………………………………………………xii
第一章緒論……………………………………………………………1
1.1前言……………………………………………………1
1.2設計流程………………………………………………4
1.3CMOS模型參數………………………………………5
1.4論文內容………………………………………………7
第二章可程控工作放大器……………………………………………8
2.1前言……………………………………………………8
2.2可程控工作放大器原理…………………………… 9
2.3二級工作放大器…………………………………14
2.4差動輸入級………………………………………16
2.5共源極放大器……………………………………30
2.6輸出級……………………………………………33
2.7頻率補償………………………………………………36
2.8偏壓選擇電路………………………………………43
第三章整體電路與模擬結果……………………………………46
3.1前言…………………………………………………46
3.2整體電路及模擬…………………………………46
3.2.1高偏壓模式之模擬結果……………………48
3.2.2中偏壓模式之模擬結果……………………52
3.2.3低偏壓模式之模擬結果……………………56
3.2.4步階響應……………………………………60
第四章佈局……………………………………………………………62
第五章結論……………………………………………………………64
參考文獻…………………………………………………………………68

[1] J. M. Shin and K. S. Yoon, “Design of a programmable slew-rate op amp,” IEEE Circuits and Systems, Vol. 1, pp. 142 -146, 1994.
[2] K. S. Yoon, “A CMOS digitally programmable slew-rate operational amplifier,” IEEE Circuits and Systems II: Analog and Digital Signal Processing, Vol. 42 11, pp. 738 —741 , Nov. 1995.
[3] J. N. Babanezhad and R. Gregorian, “A Programmable Gain/Loss Circuit,” IEEE J. of Solid-State Circuits, Vol. 22, no. 6, pp.1082- 1090, Dec. 1987.
[4] A. Mazurek, “Programmable transconductance amplifier in switched current circuits,” IEEE Electronics, Circuits and Systems, Vol. 3, pp. 1345 -1348, 1999.
[5] J. M. Steininger, “Understanding Wide-Band MOS Transistors,” IEEE, Circuits an Devices, vol. 6, no. 3, pp. 26-31, May 1990.
[6] The Data Book of Texas Instruments, Amplifiers, Comparators, and Special Functions, vol. B, pp. 6-743-6-792, 1997.
[7] D. A. Johns and K. Martin, Analog Integrated Circuit Design. Wiley, Canada, 1997.
[8] Phillip E. Allen and Douglas R. Holberg, CMOS Analog Circuit Design, Oxford, New York, 1987.
[9] E. Sackinger and W. Guggenbuhl, “A High-Swing High-Impedance MOS Cascode Circuit,” IEEE J. of Solid-State Circuits, vol. 25, pp. 298-298, Feb. 1990.
[10] B. J. Hosticka, “Improvement of the Gain of CMOS Amplifiers,” IEEE J. of Solid-State Circuits, vol. 14, pp.1111-1114, Dec. 1979.
[11] N. S. Sooch, “MOS Cascode Current Mirror,” U.S. parent no. 4,550,284, October 1985.
[12] R. Gregorian and G. C. Temes, Analog MOS Integrated Circuit For Signal Processing. Wiley, Canada, 1986.
[13] R. Gregorian, Introduction to CMOS OP-Amps and Comparators, Wiley, Canada, 1999.
[14] B. Razavi, Design of Analog CMOS Integrated Circuit, McGraw-Hill, 2000.
[15] B. k. Ahuja, “An Improved Frequency Compensation Technique for CMOS Operational Amplifiers,” IEEE J. of Solid-State Circuits, vol.18, pp. 629-633, Dec. 1983.
[16] A. Hastings. The Art of Analog Layout, Prentice Hill, New Jersey, 2001.

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