臺灣博碩士論文加值系統

在系統晶片中所使用的核心可能是由各個不同的廠家所提供的，所以當系統整合的時候，在核心與核心之間，一個標準的介面是非常重要的。 另外，由於核心的使用者對核心的內部所能了解的並不多，提供核心得廠商就必須將測試核心所需的資訊連同核心本身一並提供給使用者。為了使測試核心以及廠商和使用者之間的溝通更加容易，IEEE P1500 工作小組訂立了一個標準的測試介面及核心測試語言。
雖然是一個標準的測試介面，但是它仍然具有一定的彈性可供選擇。在這篇論文中，我們提出了一個架構於 IEEE P1500 標準測試介面上的標準測試介面產生器，由這個產生器所產生出來的標準測試介面完全符合 IEEE P1500 的標準。這個標準測試介面中包含了三個主要的部分：測試介面指令暫存器 (Wrapper Instruction Register)、測試介面穿越暫存器 (Wrapper Bypass Register)、測試介面邊界暫存器 (Wrapper Boundary Register)。論文中所提出的產生器能夠提供不同的測試介面邊界暫存器給使用者選擇。並且提供了一個使用者圖形介面讓使用者使用起來更方便。
另外一個 IEEE P1500 工作小組規範的重點是核心測試語言。這個語言主要的目的是在方便核心提供者將所有測試核心所必須知道的資訊傳遞給使用者。使用者所拿到的核心可能是還沒有測試介面但是有附上由核心測試語言所寫的檔案，這時使用者可以經由我們的測試介面產生器將所附的檔案讀取進來，接著產生所要的測試介面。加上測試介面後的核心由外部所看到的接腳會和原來的核心有些不同，這時，用來提供測試資訊的檔案也會有所改變。關於這部分的變動我們的測試介面產生器能夠自動完成測試檔案的更新動作。

In the System-on-Chip(SOC) designs, chips are composed of pre-designed cores for reducing time-to-
market overhead. The complexity of test development is increased along with more cores inte-grated
into a single chip. Moreover, cores used in SOC designs usually comes from diverse sources.
Hence, to make core test plug-and-play comes true, a standardized interface between cores is very
important. The IEEE P1500 working group works towards it. The test wrapper generator proposed
in this thesis is based on top of IEEE P1500 Wrapper.
Although IEEE P1500 has standardized wrapper, but it is still configurable. The test wrapper
generator in this paper automate the wrapper generation, and has features of flexibility. A standard
IEEE P1500 test wrapper has three basic components. Wrapper Instruction Register(WIR), Wrap-per
Bypass Register(WBY), and Wrapper Boundary Register(WBR). The test wrapper generated
can have different types of wrapper boundary register cells without modifying WIR. Besides, the
scan chain count is easily adapted to the TAM width.
The other focus point of IEEE P1500 is the Core Test Language (CTL), which is a standard
language for the transformation of all test information needed to test a core from core provider to
core user. The proposed test wrapper generator is able to transform the original bare core’s CTL
file into a new one of wrapped core, too.

1 Introduction .............................................7
1.1 SOCTestingChallenges ............ ......................7
1.2 SOC Testing Methodology . . . ......................... 8
1.3 Proposed Test Wrapper Generator ....................... 9
1.4 Organization........................................... 9
2 Previous Works ..........................................10
3 IEEE P1500 Standard .....................................14
3.1 Core Test Language .................................. .14
3.2 IEEE P1500 Wrapper . . . . ........................... 16
4 Test Wrapper Generator 18
4.1 TestWrapperArchitecture .............................. 18
4.2 Components of Test Wrapper . . ...................... .20
4.2.1 WrapperInstructionRegister......................... .20
4.2.2 Library of Wrapper Cells ........................... 20
4.3 Functions of The Wrapper Generator . . . ............. 21
4.3.1 TheTestWrapperSpecFile ......................... ....21
4.3.2 Adaptation of Scan Chain Count to TAM Width ....... 24
4.3.3 TransformationofCTLFile ......................... ...25
4.3.4 UseofTheGraphicInterface......................... ...35
5 Experimental Results ....................................41
5.1 SimulationResults .................................. ..41
5.2 PracticalApplications................................. 44
6 Conclusion and Future Work ..............................51

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