臺灣博碩士論文加值系統

本研究是利用反相器的高增益、低消耗功率特點，與史密特觸發(schmitt trigger)電路串接，形成一信號放大處理電路。並採用國內聯華電子UMC 0.5m DPDM製程技術，設計一3V單電壓，增益為85.77dB、功率消耗為16.92W、低頻3dB轉折頻率為16.67 KHz、高頻3dB轉折頻率為101.6 KHz的信號放大電路，而史密特觸發(schmitt trigger)電路之門檻電壓(threshold voltage )則設計為VT+2V、VT-1.6V來配合前一級的信號放大電路。整體信號放大處理電路而言輸入阻抗為11020、輸出阻抗為14.27K，並具有81.03W低消耗功率、面積僅80m50m的優點，因此該電路具有單電壓、低消耗功率、小面積的優點。

The work of the thesis is to develop a CMOS signal processing circuit to use with silicon photodiodes for low energy gamma and X-ray detection. The circuit consists of a preamplifier, an amplifier and a comparator for nuclear pulse signal shaping, amplification, and discrimination. The circuit is fabricated using a standard 0.5μm double-poly double-metal (DPDM) CMOS integrated-circuit process and takes a chip size less than 80μm x 50μm. The amplifier is based on a CMOS inverter and the comparator is a Schmitt trigger circuit, which have the merits of simple structure and low power consumption. The amplifier has a voltage gain up to 85 dB in the interested frequency range of 10 to 100 kHz. The circuit is operated under a single supply voltage of 3 volts and the total power consumption is less than 100μW. Sensitivity studies were also performed to evaluate the effect of manufacturing process uncertainties, operating temperature and power supply voltage fluctuations.

誌謝..........................................Ⅰ
Abstract......................................Ⅱ
摘要..........................................Ⅲ
目錄..........................................Ⅳ
圖目錄........................................Ⅷ
表目錄........................................XI
第一章 緒論...................................1
1.1研究動機...............................1
1.2文獻回顧...............................2
1.2.1 光二極體........................2
1.2.2 放大電路........................2
1.3研究目的...........................5
第二章 信號放大處理電路設計...................6
2.1 CMOS反相器............................6
2.1.1 CMOS反相器特性..................6
2.1.2 CMOS反相器放大電路設計..........7
2.1.3 反相器偏壓源探討................9
2.2 Schmitt Trigger 信號處理電路..........12
2.2.1 Schmitt trigger 電路特性........12
2.2.2 Schmitt trigger 電路設計........12
2.3 信號放大處理電路......................15
2.3.1 信號放大處理電路特性............15
2.3.2 信號放大處理電路設計............17
2.4 電路設計流程..........................18
2.4.1 信號放大處理電路設計流程........18
2.4.2 信號放大處理電路佈局驗證流程....19
第三章 信號放大處理電路模擬...................20
3.1 CMOS 反相器...........................20
3.1.1 CMOS反相器模擬..................20
3.1.2 CMOS反相器靈敏度分析............24
3.2 偏壓源分析模擬........................26
3.2.1 電阻式分壓......................26
3.2.2 MOS分壓.........................27
3.2.3 pMOS、MOS分壓...................28
3.3 CMOS反相器放大電路....................30
3.3.1 CMOS反相器放大電路模擬..........30
3.3.2 CMOS反相器放大電路靈敏度分析....34
3.3.3探討耦合電容對電路之影響.........36
3.4 Schmitt Trigger 信號處理電路..........43
3.4.1 Schmitt Trigger 電路模擬........43
3.4.2 Schmitt Trigger 電路靈敏度分析..45
3.5 信號放大處理電路......................46
3.5.1 信號放大處理電路模擬............46
3.5.2 信號放大處理電路靈敏度分析......47
第四章 系統靈敏度分析及測試...................48
4.1 光二極體模型..........................48
4.1.1 線性光二極體模型................48
4.1.2 非線性光二極體模型..............52
4.2 輸入端信號變動分析....................56
4.3 電源雜訊對電路之影響..................58
4.4 CMOS 臨界電壓變動分析.................60
4.5 CMOS元件尺寸變動分析..................62
4.6 系統測試..............................64
4.6.1 兩極反相器串接之測試............64
4.6.2 偏壓電路與兩極反相器串接之測試..65
4.6.3 Schmitt Trigger 之測試..........65
4.6.4 信號放大處理電路之測試..........67
第五章 結論...................................69
5.1 結論..................................69
5.2 建議..................................72
參考文獻.....................................73
附錄A........................................75
附錄B........................................77
附錄C........................................78
附錄D........................................87

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