本文完成多層堆疊電容式微感測器的設計、製作與特性分析。以矽製程微機電系統技術為基礎，完成微結構相關特性模擬分析後，設計不同尺寸與多樣式結構的微感測器，相關微感測器製程由國科會中區微機電中心協助完成。本微感測器由三層導電複晶矽構成，第二層複晶矽為共用結構，組成兩個上下重疊的平行板電容，以空氣為介電值。感測器輸出非線性問題藉由串聯多層堆疊電容設計來改進。由於附著力與沾黏問題，許多微元件在犧牲層蝕刻釋放製程後就失去作用，只能完成部分量測數據，但是此微感測器簡單的微機電結構與高靈敏度的特徵是能夠被預測的。未來工作將研究改善犧牲層蝕刻的長時間釋放技術，並調整元件微機電結構設計，使具高靈敏度的薄膜應力變化感測效能；使此強健結構設計之微感測器，能應用於工業控制及生物醫學量測。

The multi-layer stacking capacitive microsensors are proposed based on silicon-based MEMS technology. The results of simulation, design and microfabrication are analyzed. Also the characteristics analysis of the capacitive microsensors are presented. The microsensors with different physical sizes and functional structures are designed on the same chip. Microfabrication of the microsensors has been performed at the Central Regional MEMS Research Center supported by the National Science Council. These microsensors are designed to have robust structure with near linear output and high sensitivity in the measurement range. The microsensor’s structure has three-layer conductive polysilicon layers with air as dielectric. Two sets of overlapping parallel capacitors are constructed. The second polysilicon layer is deposited as the common terminal. When the microsensor is stressed, the distance of parallel conductive layers is changed to induce capacitance variation. The percentage of the sensing variation is fair but significant. The nonlinear problem has been improved by connecting these stacking multilayer capacitors in series. Many microdevices were out of function after release etching process due to the poor adhesion and serious sticking problems. Relative measurement is not fully completed, but structure simplicity and measurement sensitivity have made a promise. Future work will be done to develop microfabrication process for improving long-term sacrificial layer release etching technology and to adjust microstructures for compensating non-specific effects reduced film stress variations. These robust microsensor technology can be applied in area of industry and biomedicine.

中文摘要i
ABSTRACTii
目 錄iii
圖 目 錄vi
表 目 錄x
第1章緒論1
1.1 前言1
1.2 研究動機2
1.3 文獻探討2
1.4 研究方法與目的3
1.5 研究流程與論文架構4
第2章微機電製程技術與微感測器原理7
2.1 微製程技術7
2.2 表面微機械製程8
2.2.1 物理氣相沈積9
2.2.2 化學氣相沈積9
2.2.3 光微影技術10
2.2.4 蝕刻技術10
2.2.5 掀去法技術12
2.3 MPMC製程與元件製程規劃12
2.3.1 MPMC製程12
2.3.2 元件製程規劃14
2.4 基本原理17
2.5 應用公式18
第3章微感測器設計與模擬20
3.1 微感測器結構設計20
3.1.1 微結構設計與分析20
3.1.2 微結構尺寸計算23
3.2 模擬分析軟體28
3.3 微感測器輸出電容值30
3.4 微感測器設計模擬37
3.4.1 尺寸模擬37
3.4.2 受力模擬43
3.5 微感測器分析50
3.5.1 應力分析50
3.5.2 線性度分析54
3.6 微感測器光罩設計60
第4章量測分析與討論74
4.1 犧牲層蝕刻製程分析74
4.2 晶片之微感測元件分布81
4.3 微感測器封裝與量測87
4.3.1 微感測器電性封裝87
4.3.2 微力感測與量測88
4.4 微製程分析討論91
第5章結論與未來發展94
5.1 結論94
5.2 未來發展95
參考文獻97

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