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研究生:朱哲毅
研究生(外文):Jer-I Chu
論文名稱:使用數位訊號處理軟體及硬體方法降低遠端量測系統中響應波形之內嵌雜訊
論文名稱(外文):Noise Reduction in a Remote Measurement System by using DSP Software and Hardware Methods
指導教授:白英文白英文引用關係
指導教授(外文):Ying-Wen Bai
學位類別:碩士
校院名稱:輔仁大學
系所名稱:電子工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:85
中文關鍵詞:遠端量測系統有限脈衝響應濾波器均方誤差CPU時間
外文關鍵詞:Remote Measurement SystemFIR FilterM.M.S.E.CPU time
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在遠端量測系統中,近端使用者調整波形後,透過網路傳送至遠端PC連接的實驗電路板,由於實驗電路板中的微算機型示波器、主客式訊號產生器以及測試電路導致由遠端PC傳送回來的波形受到雜訊的干擾,在本論文中,我們提出數位訊號處理的方式取代以前採重複取樣量測到的波形並用軟體加以平均的方法。我們在近端或遠端將受到雜訊的干擾的波形通過有限脈衝響應濾波器,以達到降低雜訊對量測波形的影響,在此,我們使用三種不同的有限脈衝響應濾波器(FIR filter)︰使用漢明窗口(Hamming Window)和凱瑟窗口(Kaiser Window)所設計的數位濾波器,以及利用Parks-McClellan演算法(Parks-McClellan algorithm)所得到的等紋線性相位濾波器(Equiripple Linear-Phase Filter),此外我們定義均方誤差(Mean Square Error, M.S.E)針對不同的濾波器階數作為評估濾波器濾波性能指標,由模擬結果得知,最小的M.S.E值不一定和最大的N成正比,而且三種有限脈衝響應濾波器可改善M.S.E達30%至50%,另外,我們在所設定濾波器的規格之下,比較CPU執行濾波器的演算法或數學模組的計算花費時間,而模擬結果顯示出CPU時間是和N值成正比的,而不同的數位濾波器有相異的CPU時間。最後,我們以硬體架構實現數位濾波器的功能,也驗證了與軟體模擬時得到的類似結果。
In the operation of a remote measurement system, the response waveforms of the testing circuits connected with the interface circuit include the unwanted noise. Hence, in this paper, we propose the use of the digital signal processing method instead of our previously proposed method of using repeatedly measured response waveforms and software average methods. We pass the measured waveforms with their excessive noise through digital FIR filters to reduce the influence of noise at either the local or remote computers. Here, we use three types of the digital FIR filters: a FIR filter designed with a Hamming window, with a Kaiser window and an equiripple linear-phase FIR filter based on a Parks-McClellan algorithm. In addition, we compare their filtering performance that depends on the Minimum Mean Square Error (M.M.S.E.) with respect to the different filter order N. Our experiment results show that the higher filter order N is not positively in proportion to the better of M.M.S.E. However, all of the three filters can provide a range of improvement of from about 30 percent to 50 percent in M.M.S.E.. Finally, we compare the computation cost. The experimental results show that the computation cost is in proportion to the filter order N, but the computation cost is different from the varied digital filters. Finally, we use hardware structure to implement a function of the digital filter to verify the results of the software simulations.
中文摘要………………………………………………….…………...…i
英文摘要…………………………………………………………………ii
誌謝……………………………………………………………………iii
目錄………………………………………………………………...……iv
表目錄……………………………………………….…………………vii
圖目錄………………….…………………………..…………………viii
第1章 緒論…………………………….………………………………1
1.1 背景……………………………………………...……………2
1.2 動機…………………………….………………...……………3
1.3 簡介DSP(Digital Signal Processing/Processor)…………4
1.3.1 何謂DSP…………………………………….………...…4
1.3.2 DSP之優點及應用………………………….……………5
1.4 本論文之大綱架構…………………………...………………7
第2章 有限脈衝響應(Finite Impulse Response, FIR)數位濾波器理論……….………………………………………….……………8
2.1 簡介數位濾波器………………………………...……………8
2.1.1 理想濾波器的概念………...…………...…..……………8
2.1.2 數位濾波器的形成……..…………………………………9
2.2 採用漢明窗口(Hamming Window)設計FIR低通濾波器...…16
2.3 採用凱瑟窗口(Kaiser Window)設計FIR低通濾波器…….…18
2.4 基於最佳化法(Optimal Method)設計的線性相位(Linear-Phase)等紋FIR濾波器(Equiripple FIR Filter)….……………………20
2.5 模擬條件的設定……………………………...………………24
第3章 以軟體(Software)方式實現有限脈衝響應數位濾波器……...30
3.1 模擬環境介紹……………...………………………………….30
3.2 關於軟體的模擬結果………………...……………………….30
3.2.1 針對反向器(Inverter)輸出的響應波形……...…………..30
3.2.2 針對放大器(Amplifier)輸出的響應波形……..………...36
3.2.3 針對微分器(Differential)輸出的響應波形…..……….…42
3.3 模擬結果整理與討論…………………………...….…………47
第4章 以硬體(Hardware)方式實現有限脈衝響應數位濾波器……..53
4.1 DSP單晶片之特點………………………………...……….….53
4.2 簡介STC32 內嵌式DSP控制卡…………………..………….53
4.3 關於硬體的模擬結果…………………...…………………….59
4.3.1 針對反向器(Inverter)輸出的響應波形……..………..….60
4.3.2 針對放大器(Amplifier)輸出的響應波形…..…………...62
4.3.3 針對微分器(Differential)輸出的響應波形..…………….64
4.4 模擬結果整理與討論………………………………...……….66
第5章 結論……………………………..……………………….…….70
參考文獻…………………………………………………………...…...72
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