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研究生:蔡富凱
研究生(外文):Fu-Kai Tsai
論文名稱:時間延遲積分式之紅外線偵測器讀出電路設計
論文名稱(外文):The Infrared Detector Read-Out Circuit Design Using Time Delay and Integration Technique
指導教授:黃 弘 一
指導教授(外文):Hong-Yi Huang
學位類別:碩士
校院名稱:輔仁大學
系所名稱:電子工程學系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:56
中文關鍵詞:讀出電路時間延遲積分式焦平面
外文關鍵詞:Readout CircuitTime Delay and Integration(TDI)Focal Plane Array
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本研究所提出的新型讀出電路(Readout Circuit),主要是利用時間延遲積分式(Time Delay and Integration)的概念去實現互補式金氧半(CMOS)紅外線偵測讀出設計,這樣的概念除了可以增加電路中訊號雜訊比(Signal to Noise ratio)外,同時也讓原本應用於CCD(Charge-Coupled Device)的技巧,可以轉移到VLSI的領域上。另外本研究提出一個偵察電路,目的在於根據光二極體的特性曲線並配合偵察電路,使得讀出電路不會因為光二極體的損壞而影響到電路操作。整體而言,本研究所提出的讀出電路可以運用於低溫長波紅外線的偵測,且利用掃描的形式來偵測物體,大大增加了可測範圍,同時為了避免不必要的雜訊及功率損耗,在電路的複雜性上也是利用簡單的電路完成。依本論文所提出之電路架構, 在 Hspice電路模擬, 與 TSMC 0.35μm 1P4M 3.3 V 的CMOS製程實作出操作於2MHz而動態範圍為70dB的32×4TDI讀出晶片,並驗證了其紅外線訊號經讀出電路後而被讀出的功能。此外為了能提升像素的解析度,本研究又以同樣架構下線製作128×4的讀出晶片,以求能應用於產品上的需求。

A novel CMOS readout circuit with time-delay-integration (TDI) is proposed. Using the technique, the signal-to-noise ratio can be improved. A cell failure testing circuit is applied in the design. The faulty diodes are detected. Then the current paths of the faulty diodes are cut off by the testing circuit. Thus the operation of the readout circuit is not affected by the faulty diodes. For long-wave and low-temperature infrared signal application, the readout circuit increases the detecting range by scanning the object. Moreover, the circuit structure is very simple. The device noise and power dissipation can be reduced.
The readout circuit designed and fabricated by 0.35μm 1P4M n-well CMOS technology has been measurement. The power consumption of whole chip is 100mW at 3.3V power supply. The chip area is 2000×1800μm2.

中文摘要 Ⅰ
英文摘要 Ⅱ
誌謝 Ⅲ
目錄 Ⅳ
表式目錄 Ⅶ
圖式目錄 Ⅷ
第一章 導論
1.1 動機 ………………………………………………………..1
1.2 先前技術簡介 ……………………………………………..1
1.2.1 紅外線讀出影像的基本需求規格 …………………1
1.2.2 紅外線偵測器 …………………….…………….…..3
1.2.3 紅外線讀出電路 …………………….……………...5
1.2.4 紅外線焦平面架構 ………………………………..11
1.2.5 降低雜訊的技術 …………………………………..13
1.3 各章節簡述 ………………………………………………13
第二章 時間延遲積分式的模式和操作
2.1 影像掃描架構 ………………………………………………15
2.2 時間延遲積分式的概念及原理 ……………………………16
第三章 紅外線訊號讀出電路的設計與分析
3.1 類比讀出細胞單元電路 ………………………………….…21
3.2 數位訊號控制電路 …………………………………………..27
3.3 時間延遲積分式之紅外線讀出電路架構 …………………..29
3.4 模擬結果 …………………………………………………..…31
第四章 降低雜訊電路技巧與讀出電路
4.1 降低雜訊電路技巧 ………………………………………….37
4.2 降低雜訊的讀出電路 ………………………………………..39
4.3 低雜訊紅外線讀出電路架構 ……………………………….44
4.4 模擬結果 …………………………………………………….45
第五章 佈局考量與實驗結果
5.1 佈局考量 …………………………………………………….49
5.2 實驗結果 …………………………………………………….50
第六章 總結與問題討論
6.1 結論與討論 …………………………………………………55
6.2 未來工作 ……………………………………………………56
參考文獻
簡歷

參考文獻
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