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研究生:黃建峰
論文名稱:以加減運算為基礎的同步錯誤偵測方法
論文名稱(外文):A concurrent error detedtion method.based on addition and subtraction operations
指導教授:王行健
學位類別:碩士
校院名稱:國立中興大學
系所名稱:資訊科學研究所
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:34
中文關鍵詞:同步錯誤偵測
外文關鍵詞:concurrent error detecting
相關次數:
  • 被引用被引用:0
  • 點閱點閱:1094
  • 評分評分:
  • 下載下載:127
  • 收藏至我的研究室書目清單書目收藏:0
這篇論文著眼於電路運作中的同步錯誤偵測的研究。我們的想法是利用加法或減法的運算,使得輸出的個數可以用每次減半的速度遞減,反覆進行同樣的步驟,一直到產生出我們需要的檢查位元個數為止。

第一章 簡介…………………………………………………1
1.1 研究動機……………………………………………1
1.2 內容大綱……………………………………………4
第二章 背景知識……………………………………………5
2.1 同步錯誤偵測………………………………………5
2.2 完全自我檢查電路……………………..…………6
2.3 檢查器…………………………………..…………6
2.4 錯誤類型和漢明距離………………………………8
2.5 錯誤偵測碼………………………………………..9
第三章 同步錯誤偵測架構………………………………….12
3.1 基本架構…………………………………………………12
3.2 基本分析…………………………………………………14
第四章 實驗……………………………………….………23
4.1 實驗步驟………………………………………….23
4.2 實驗結果……………………………………….…25
第五章 結論與未來工作……………………………….…31
參考文獻…………………………………………..…………32

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