臺灣博碩士論文加值系統

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 目前大部份使用中的公開金鑰密碼系統中，最消耗時間及系統資源的部份就是modular exponentiation ，而其基礎則在於modular multiplication。本研究的目的在於儘可能地降低在smart card 上所須耗用的資源，特別是以可行的演算法來避免使用硬體除法器，藉此在標準微處理器上實作公開金鑰密碼演算法。研究內容將詳細探討Montgomery modular multiplication algorithm在reduction過程中估算除法商數的演算法的實作方式。在考慮到以C++或Pascal等高階語言無法有效率地處理多重精確度的算術運算（主要是有關標準算術運算中carries 的取得及對記憶體的存取速度），實作中將以硬體描述語言來完成Montgomery algorithm的設計。
 In most public-key crypto systems used today, the most time consuming part of these systems is the modular exponentiation. The base of this computation is the modular multiplication. Our study is to minimize the resources used in smart card. Hardware divisors will be prohibited if a comparable efficiency is obtained without it. Our study also focuses on the ability to implement modular multiplication algorithm on nearly standard processor.This article first shows the implementation of the reduction of the Montgomery modular multiplication algorithm. On concerning the drawback on dealing with multiprecision arithmetic by high-level languages such as C++ or Pascal, the implementation will be finished by Verilog hardware description language on the design of Montgomery algorithm.
 中 文 摘 要 iAbstract ii誌謝 iii章 節 目 錄 iv圖目錄 vi第一章 RSA密碼系統簡介 11-1 模數運算 11-2 RSA 演算法 3第二章 模數乘法運算 42-1 Notations 42-2 Interleaved multiplications-reductions 42-3 Residue number systems 5第三章 多精確度的整數運算 73-1 Addition and Subtraction 73-2 Multiplication 83-3 Squaring 93-4 Extended Euclidean algorithm 93-5 Binary extended gcd algorithm 10第四章 以Montgomery Algorithm實作模數乘法運算 124-1 Montgomery reduction 124-2 Montgomery multiplication 14第五章 以硬體描述語言實作Montgomery Algorithm 175-1 VHSIC Hardware Description Language 175-2 Verilog Hardware Description Language 195-3 Wave form simulations 21第六章 結論 27參考索引 28附錄 30自述 41
 [DHEM98 ] Jean-Francios DHEM, “Design of an efficient public-keycryptographic library for RISC-based smart cards”, chapter2, pp.11-56, 1998[MONT85] P. L. Montgomery, “Modular multiplication without trialdivision,” Mathematics of Computation, Vol. 44, pp. 519 –521, 1985[SEE93] S.E. Eldridge and C.D. Walter “ Hardware implementationof Montgomery multiplication algorithm,” IEEE Trans.Compt., Vol. 42, no 6, pp. 693, 1993[SRD91] S.R. Dusse and B. S. Kaliski Jr., “A cryptographic libraryfor the Motorola DSP 5600,” in Advances in Cryptology –EUROCRYPT ’90, Vol. 473, pp. 51-60, 1991[RLR78] R. L. Rivest, A. Shamir, and L. Adleman, “ A method forobtaining digital signatures and public key cryptosystems,”Communication, ACM. Vol. 21, pp. 120- 126, 1978[AJM97] A. J. Menezes, P. C. van Oorschot, and S. A. Vanstone,"Handbook of Applied Cryptology," chapter 14. pp.594-603.1997[Barett86]P. Barett, "Implementing the Rivest Shamir and AdlemanPublic Key Encryption Algorithm on a Standard DigitalSignal Processor," Proc. CRYPTO'86, pp. 311-323.[BGV93] A. Bosselaers, R. Govaerts, and J. Vandewalle, "Comparisonof Three Modular Reduction Functions," Proc. CRYPTO'93,pp.175-186.[Ckim01] Chinuk Kim ,“Vhdl Implementation Of Systolic ModularMultiplications On RSA Cryptosystem ,“ 2001[Knuth98] D.E. Knuth , ”The Art of Computer Programming, Volume2, Seminumerical Algorithms .Addison-Wesley, Reading,MA Third edition,1998[MSJV93] M. Shand and J. Vuillemin, “Fast Implementations of RSAcryptography," Proceedings of the 11th IEEE Symposiumon Computer Arithmetic, IEEE Computer Society Press,Los Alamitos, CA, 1993, pp. 252-259.[CDW92] C.D. Walter, “Faster modular multiplication by operandscaling," Advances in Cryptology, Proc. Crypto'91, LNCS576, J.Feigenbaum, Ed., Springer-Verlag,1992, pp. 313-323.[PJA96] Peter J. Ashenden, “The Designers’ guide to VHDL,”Morgan Kaufmann Publishers, Inc. pp.351, Netherlands,1996[黃文吉02]黃文吉, “VHDL 基本程式寫作及應用”, 儒林圖書公司,Feb 2002[鄭信源02]鄭信源, “Verilog 硬體描述語言數位電路設計實務”, 儒林圖書公司, Feb 2002
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