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研究生:黃禎毅
研究生(外文):Chen-Yi Huang
論文名稱:多晶矽間的氧化層-氮矽化合物-氧化層對堆疊閘極式快閃記憶體電荷流失之影響
論文名稱(外文):Effect of ONO (Oxide-Nitride-Oxide) Interpoly on Charge Loss in Stacked-Gate Flash Memory
指導教授:洪茂峰洪茂峰引用關係王永和王永和引用關係
指導教授(外文):Mau-Phon HoungYeong-Her Wang
學位類別:碩士
校院名稱:國立成功大學
系所名稱:微電子工程研究所碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:74
中文關鍵詞:傳導機制電荷流失多晶矽間的介電質快閃式記憶
外文關鍵詞:ONO interpolyFlash memoryConduction mechanismCharge loss
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近年來, 快閃式記憶體廣泛地應用於可攜式電子產品的資料儲存上,如數位相機與筆記型電腦。雖然到目前為止在市場上有許多不同類型的快閃記憶體元件被發表,但堆疊閘極式快閃記憶體仍是低功率及高速快閃記憶體產品的主流及最有潛力的人選。然而就一個先進快內式記憶體設計來說,資料保存的可靠性是主要的考量重點。在過去,多晶矽間的氧化層-氮矽化合物-氧化層(ONO interpoly)的厚度設計是主要課題,而且多著重在薄化氮矽化合物層(Silicon nitride)與厚化頂氧化層(Top oxide)及底氧化層(Bottom oxide)的厚度。在本研究論文中,我們首先報告多晶矽間的介電質在正、負極性下的電性特性,而且會和單一氧化層介電質作一個比較。根據實驗結果,我們將提出非對稱式多晶矽間的介電質的傳導機制,此機制將著重於正、負偏壓下電子和電洞的複合效應。再者,我們會討論到多晶矽間的氧化層-氮矽化合物-氧化層對堆疊閘極式快閃記憶體電荷流失之影響。我們認為元件經過1000次循後後電荷流失量增加,這是由於陷入多晶矽間的介電質電子數目增加所致。在參考上述所提的傳導機制而改良的操作條件下,我們成功地將多晶矽間的介電質所陷入的電子數目減少,進一步地改善快閃記憶體的電荷流失現象。
Recently, the Flash memory has received much attention for application to the digital cameras and notebooks as portable mass storage. Although many different Flash cell variations have been reported and introduced into the market place so far, stacked-gate flash memory is still considered as a potential candidate and mainstream for low power and high-speed Flash memory products. However, for the design of advanced flash memory devices, the reliability of data retention is a major concern. In the past, the thickness of ONO (Oxide-Nitride-Oxide) interpoly was regarded as the key issue, and it was mainly focused on thinning the nitride and thickening the top and bottom oxide. In this thesis, first we report electrical characteristics of the ONO dielectric films under both stress polarities, and characteristics of the oxide films are taken as reference. From the experimental results, conduction mechanism of asymmetric ONO dielectric is proposed in this study, which is concentrated on hole-electron recombination under positive and negative stressing. Moreover, the effect of ONO (Oxide-Nitride-Oxide) interpoly on charge loss in stacked-gate flash memory is discussed. We claim that increase of charge loss after 1000 program/erase cycles is cause by electrons trapped in the ONO interpoly. With changed operation conditions according to conduction mechanism model, we successfully reduce the number of electrons trapped in ONO interpoly, and then decrease charge loss phenomenon of the flash memory device.
English abstract i
Chinese abstract ii
List of Tables iv
List of Figures v

Chapter 1 Introduction 1
Chapter 2 Sample Preparation and Experimental Setup 4
2.1 Device Fabrication 4
2.2 Measurement Setup 6
2.3 Fundamental and Operation Principle of Flash Memory 7
2.3.1 Fundamental of Floating-Gate Device 7
2.3.2 Operation Principle 10
2.4 Interpoly Dielectric 12
2.4.1 Development of Interpoly Dielectric 12
2.4.2 Characteristics of SiO2 and Si3N4 13
Chapter 3 Electrical Characteristics of Oxide-Nitride-Oxide (ONO) 30
3.1 Ramp-Voltage Breakdown Characteristics 30
3.2 Constant-Current Breakdown Characteristics 32
3.3 Constant-Voltage Breakdown Characteristics 34
3.4 Conduction Mechanism of Asymmetric ONO Dielectric 35
Chapter 4 Effect of ONO Interpoly on Charge-Loss in Flash Memory Devices 54
4.1 Intrinsic Charge-Loss Phenomena 54
4.2 Cause of Charge-Loss in Flash Memory Devices 55
4.3 Summary 57
Chapter 5 Conclusions and Future Works 67
5.1 Conclusions 67
5.2 Future Works 68
References 70
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