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研究生:王文翰
研究生(外文):Wen-Han Wang
論文名稱:熱載子效應在0.1μm短通道及2nm閘極薄氧化層SOICMOSFET所造成特性退化之研究
論文名稱(外文):The Study of Hot Carrier Induced Degradation on 0.1μm SOI CMOSFET with 2nm Thin Gate Oxide
指導教授:方炎坤方炎坤引用關係葉文冠葉文冠引用關係
指導教授(外文):Yean-Kuen FangWen-Kuan Yeh
學位類別:碩士
校院名稱:國立成功大學
系所名稱:微電子工程研究所碩博士班
學門:工程學門
學類:電資工程學類
論文種類:學術論文
畢業學年度:90
語文別:中文
論文頁數:34
中文關鍵詞:熱載子效應
外文關鍵詞:HCESOI
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摘 要

本論文係針對使用較先進製程的SOI CMOSFETs做熱載子效應以及可靠度分析的研究。隨著元件尺寸的縮小,由於操作電壓下降的速度跟不上尺寸縮小的比例,因此當元件縮小到深次微米時,電場的作用往往大於長通道時,使得熱載子效應變的更加嚴重,因此對元件退化的影響也更大。因為電洞的載子移動率以及平均自由路徑都遠小於電子,故在以往長尺寸元件中,元件的退化多為針對NMOSFETs討論。但是當元件尺寸縮小到深次微米時,上述兩個參數對於元件特性的影響變得不可忽略,導致PMOSFETs的元件特性退化開始被重視。因此本論文的研究也同時對NMOSFETs以及PMOSFETs進行討論。

在實驗中,吾人對NMOSFETs以及PMOSFETs施加比正常操作電壓還高的電壓以加速其退化,並由實驗結果探討其退化機制以及推測十年可靠度的工作電壓。由實驗結果發現,造成MOSFETs退化的主因可分為電子注入,電洞注入與接面缺陷。其中,NMOSFETs的退化是以impact ionization與interface states為主,而其最嚴重退化情形由以往的Vg=Vd/2時轉變為Vg=Vd時。而PMOSFETs的退化,則以電洞注入造成閘極氧化層破壞為主,而非以往所認為的電子注入所造成。閘極與基板的品質及厚度雖都會影響退化程度,但最大的變因仍是操作電壓。
Abstract

In this thesis, the target has been paid on the study of hot carrier effect on SOI CMOSFETs. The samples are N-and P-MOSFETs by 0.1μm technology on 8” SOI wafer. As devices scaling down to deep-submicron region, the dimension shrinkage is more than the decreasing in device’s operation voltage, this makes the electrical field more stronger and hence the hot carrier effect. In long channel devices, most of the studies have been focused on NMOSFETs for its higher mobility and longer mean free path with comparison to PMOSFETs. However, as device dimension is shrink to deep-submicron region, the degradation in PMOSFETs has confirmed to have substantial effect on device operation. Therefore both NMOSFETs and PMOSFETs are investigated in the study.

Both NMOSFETs and PMOSFETs were stressed with a higher voltage in order to accelerate degradation for study. We also discuss the degradation mechanisms and predict the device operational voltage for 10 years. Based on the experimental results, we conclude the main degradation is caused by electron injection, hole injection and interface states. Electron injection and interface states are responsible for NMOSFETs, and its worst condition is no longer in the case of Vg=Vd/2 but instead Vg=Vd. In PMOSFETs, hole tunneling is the dominant degradation process instead of electron tunneling. The degradation depends on both the gate oxide and Si film quality, but the operational voltage is still the dominant factor.
目 錄

中文摘要
英文摘要
附圖表目錄
頁數
第一章 前言……………………………………………………………1
第二章 基本背景理論與測試實驗設計………………………………3
2.1---SOI材料與製造方法簡介…………………………...3
2.2---SOI MOSFET基本特性……………………………..6
2.3---基本熱載子退化機制………………………………..7
2.4---實驗內容設計………………………………………10
2.4.1---元件製作……………………………………….10
2.4.2---量測設計……………………………………….10
第三章 NMOS I/V量測結果與分析………………………………13
3.1---通道長度的影響…………………………………...13
3.2---Body Contact的影響………………………………18
3.3---晶片溫度的影響…………………………………...19
3.4---施加偏壓的影響…………………………………...22
第四章 PMOS I/V量測結果與分析………………..……………...24
4.1---通道長度的影響……………………………………24
4.2--- Body Contact的影響………………………………26
4.3---晶片溫度的影響……………………………………27
4.4---施加偏壓的影響……………………………………30
第五章 結論與未來展望……………………………………………..32
5.1---結論…………………………………………………32
5.2---未來展望……………………………………………33

參考文獻
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致謝與自述
參 考 文 獻

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