本論文第一部份是IEEE 802.11a WLAN接收機射頻系統之設計規劃，首先闡述相位雜訊對正交分頻多工(OFDM)訊號的影響為共模相位雜訊與載波相互干擾，並量化此影響，推得符合IEEE 802.11a規範的接收機振盪器相位雜訊的要求至少為 -95dBc/Hz@100kHz。然後，根據 802.11a 標準內訂定的射頻接收測試(靈敏度、非相鄰/相鄰頻道干擾、與最大功率輸入)與參考HIPERLAN/2的阻隔測試與贅餘響應測試，找出符合802.11a規範接收機的射頻效能參數的要求：NF<10dB，IIP3>-19dBm，IIP2>-4dBm， P1dB>-27dBm，鏡像頻率抑制>61dB，I/Q imbalance<5度，0.5dB。此外，亦對無頻率響應的IIP3串接的公式做修正，推導出有頻率響應的IIP3串接公式。論文所探討的802.11a WLAN射頻接收機之實際設計流程，可提供給射頻接收機系統規劃者與射頻電路設計者很有用的參考。
論文第二部份是選定雙降頻式超外差接收機架構，利用TSMC CMOS 0.18�慆的製程設計5GHz差動低雜訊放大器與雙平衡式Gilbert cell混波器，低雜訊放大器增益5.2dB，雜訊指數4.9dB，OIP3 4.9dBm，混波器轉換增益-2.2dB，OIP3 2.1dBm，LO-IF隔離度28dB。另外5GHz CMOS電流共用低雜訊放大器的設計方面，量測結果為增益11.2dB，雜訊指數4.5dB，輸入返回損耗10.5dB。

This thesis presents: (1) the study of RF system planning and receiver architecture for IEEE 802.11a WLAN OFDM system, and (2) development of 5GHz CMOS differential LNA/mixer RFICs for a double down-conversion heterodyne receiver. System planning parameters including phase noise, noise figure, IIP3, IIP2 and I/Q imbalance are derived to meet the 802.11a standard requirements. The derived RF parameters to meet 802.11a standard requirements are: phase noise <-95dBc/Hz@100kHz, NF<10dB, IIP3 >-19dBm, IIP2 >-4dBm, selectivity > 23.5, 39.5, and 59dB at offset 20, 40, and 50MHz, I/Q amplitude imbalance<0.5dB, I/Q phase imbalance<5degree, input P1dB(low gain mode) > -27dBm, and image rejection>61dB. The study will be very useful for RF circuit designers.
The 5 GHz CMOS differential LNA/mixer uses a TSMC standard 0.18�慆 CMOS technology. The RF is from 5.725 to 5.825 GHz and the LO (and IF) frequency is a half of the RF for double down-conversion heterodyne receiver. The cascode LNA has 5.2dB gain and 4.9dB noise figure. The current reused LNA has 11.2dB gain, 4.5dB noise figure and 10.5dB input return loss. The doubly-balanced mixer has -2.2dB conversion gain, 2.1dBm OIP3 and 28dB LO-IF isolation.

目 錄

第一章 緒論 1

第二章 相位雜訊對OFDM訊號影響之分析及量化

2.1 正交分頻多工(OFDM)簡介 6
2.2 非理想振盪源 8
2.3 分析相位雜訊對OFDM訊號的影響 8
2.4 共模相位雜訊與ICI的量化 10

第三章 IEEE 802.11a接收機射頻效能參數要求

3.1 IEEE 802.11a WLAN射頻接收相關規範 15
3.2 接收機射頻效能參數 16
3.2.1 雜訊指數(Noise Figure : NF) 16
3.2.2 交互調變失真(Intermodulation Distortion :IMD) 19
3.2.3 1dB增益壓縮點(1dB Compression Point) 24
3.3 接收機射頻效能參數與IEEE 802.11a規範間的關係 24
3.3.1 靈敏度(Sensitivity)測試 25
3.3.2 鄰近頻道/相隔鄰近頻道抑制測試 28
3.3.3 阻隔(Blocking)測試 31
3.3.4 最大輸入功率測試 35
3.3.5 贅餘響應(Spurious Response)測試 36
3.4 結論 37

第四章 IEEE 802.11a接收機射頻架構討論

4.1 超外差接收機(Super-Heterodyne Receiver) 39
4.1.1 應用於IEEE 802.11a之超外差接收機規劃實例 40
4.2 直接降頻接收機(Direct-Conversion Receiver) 43
4.2.1 應用於IEEE 802.11a之直接降頻式接收機規劃實例 48
4.3 雙降頻式超外差接收機 50
4.3.1 應用於IEEE 802.11a之雙降頻式超外差接收機規劃實例 51
4.4 結論 53

第五章 5GHz雙降頻式超外差接收機之CMOS LNA/Mixer設計

5.1 5GHz CMOS差動低雜訊放大器 55
5.1.1 CMOS低雜訊放大器架構 55
5.1.2 CMOS低雜訊放大器雜訊模型推導 55
5.1.3 5GHz CMOS差動低雜訊放大器設計模擬 58
5.1.4 非理想差動訊號源 62
5.1.5 量測與修正模擬 64
5.1.6 結果討論 66
5.2 5GHz CMOS雙平衡Gilbert cell混波器 67
5.2.1 設計模擬 68
5.2.2 量測與修正模擬 71
5.2.3 結果討論 74
5.3 5GHz低雜訊放大器與混波器整合模擬結果 75
5.4 結論 76

第六章 結果與討論 77

參考文獻 78

附錄A 5GHz CMOS電流共用低雜訊放大器設計與量測 80

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