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[1]Behzad Razavi, “Design of Sample-and-Hold Amplifiers for High-Speed Low-Voltage A/D Converters”, IEEE Custom Integrated Circuits Conference of Proceedings, 1997,pp59-66. [2]Philip E. Allen, Douglas R. Holberg, “COMS Analog Circuit Design”, Harcourt Brace Jovanovich College Publishers,1987. [3]Kevin kattmann and Jeff Barrow, “A Technique for Reducing Differential Non-linearity Errors in Flash A/D Converters”, IEEE International Solid-State Circuits conference, Digest of Technical Papers.1991,pp.170-171 [4]Peter Scholtens, “A 2.5Volt 6 bit 600MS/s Flash ADC in 0.25um CMOS”. 26th European Solid-State Circuits Conference Stockholm, Sweden, 19-21 September 2000, [5]Klaas Bult, Aaron Buchwald, Joe Laskowski, “A 170mW 10b 50MSample/s CMOS ADC in 1mm2”, IEEE International Solid-State Circuits Conference, Digest of Technical paper,1997,pp.136-137 [6]David Johns and Ken Martin, ”Analog integrated circuit design”, John Wiley & Sons, Inc.,1997. [7]Behzad Razavi, Rruce A. Wooley, “A 12-b 5-MSampling/s Two-Step CMOS A/D Converter”, IEEE Journal of Solid-Static Circuit, , Volume: 27; Issue 12, DEC. 1992, pp.36 -37 [8]Michael P. Flynn, Ben Sheahan, “A 400-Msample/s, 6-b CMOS Folding and Interpolating ADC”, IEEE Journal of Solid-Static Circuit, Volume: 33; Issue 12, DEC. 1998.pp. 1932 -1938. [9]Tan P. B. Y., Suparjo B. S., Wagiran R. and Sidek R. “An Efficient Architecture of 8-bit CMOS Analog-to-Digital Converter”, IEEE International Conference on Proceedings of Semiconductor Electronics, 2001,pp.178-186. [10]Joey Doernberg, Paual R. Gary, David A. Hodges. “A 10-bit 5-Msample/s CMOS Two-Step Flash ADC”, IEEE Journal of Solid-state circuits, Volume:24; Issue:2, April 1989,pp241-249. [11]Yun-Ti Wang and Behzad Razavi “An 8-Bit 150MHz CMOS A/D Converter”, Solid-State Circuit, IEEE Journal of, Volum:35 Issue:3, March 2000. [12]Dr. Clemens Hammerschmied “Nyquist-Rate A/D Converters — A General Overview”, Workshop on A/D Converters for Telecommunication, Oct. 2001. [13]Naoki Kurosawa, Haruo Kobayashi, Kaoru Maruyama, Hidetake Sugawara, and Kensuke Kobayahi, “Explicit Analysis of Channel Mismatch Effects in Time-Interleaved ADC Systems”, IEEE Transaction on circuits and system-I: Fundamental Theory and Applications, volume: 48, Issue:3, March 2001,pp.261-271 [14]Tsukamoto, S.; Schofield, W.G.; Endo, T. “A CMOS 6-b, 400-MSample/s ADC with error correction”, IEEE Journal of Solid-State Circuits,Volume: 33 Issue: 12 , Dec. 1998,pp. 1939 -1947 [15]Roubik Gregorian, “Introduction to CMOS OP-Amps and comparators”, John Wiley &Sons, Inc.1999. [16]丁再進,”A/D轉換器入門”, 全華科技圖書股份有限公司,1998.
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