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研究生:饒書銓
研究生(外文):Shu-Chuan Jao
論文名稱:利用模擬器建構之AMBAAHB匯流排介面驗證系統
論文名稱(外文):A Verification System with a Simulator of AMBA AHB Bus Interface
指導教授:吳全臨林瀛寬單智君
指導教授(外文):Chuan-Lin WuYin-Kuan LinJean, J.J. Shann
學位類別:碩士
校院名稱:國立交通大學
系所名稱:資訊工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:36
中文關鍵詞:模擬器建構
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從六零年代起, IC工業依照著 Moore’s law (每十八個月 IC 的容量會增加一倍)快速的發展. 如此一來, IC 設計的複雜度增加也使得設計驗證更加的困難. 另一方面, 設計者也面臨產品的研發週time-to-market (TTM) 和設計驗證過程完整度之間重大的取捨. 其次, 一種新的設計方法, 系統單晶片 (SOC), 它的目的是在追求產品設計成本的降低和縮短產品研發週期. 所有的矽智財元件將被整合在一顆單一晶片中,但是隨之而來的問題是使得設計驗證將會更形複雜.
藉由傳統的設計驗證方法, 設計者必須花費龐大的時間與努力來找到錯誤所在. 我們改進既有產生測試樣本的方法建立一套更加方便的設計驗證環境來驗證AMBA AHB 設計. 利用一個用 C 程式語言所建立的模擬器, 我們在驗證我們所設計的 AMBA AHB 時, 花費了更少的努力和時間卻得到了更令人滿意的結果.
此外,其他的 AMBA AHB 設計者也可以利用我們的驗證系統及方法進行驗證, 這個驗證系統並不被限制只能夠使用在驗證我們的 RTL 設計上.

Since the 60s, the IC industry has made significant progress following Moore’s law: “the volume of the IC doubles per 18 months”. Moreover, System-on-chip (SOC) solution, a new design methodology, addresses cost-efficiency. That is, using this methodology, all intellectual property (IP) is integrated into a single system. As a result of the increasing complexity of the RTL design, verifications become more and more difficult. Due to the great increase in gates/pins ratio, all designers are facing a big trade-off between the verification process and time-to-market (TTM).
With the traditional ways of verification methodologies, designers need to spend enormous time on finding errors. We improved the conventional test pattern generating method into a more convenient environment to verify the AMBA RTL designs. With the simulator of AMBA AHB written in C language, less effort and time were spent in our design flow but more satisfying result was achieved when we verified our AMBA AHB design.
In addition, with the system and methodology we provide, all AMBA AHB RTL designers can also conduct their verifications. Our verification system is not usable only for our AMBA AHB design.

1.Introduction………………………………………………………………………...1
1.1 Motivation………………………………………………………………………1
1.2 Objective………………………………………………………………………..2
2. AMBA and AHB overview…………………………………………. ……….........3
2.1AMBA specification………………………………………………………………3
2.1.1 Overview of AMBA…………………………………………………………..3
2.1.2 Objectives of AMBA specification…………………………….......................3
2.1.3 Introduction to the AMBA Buses………………………………. ……………4
2.2 AMBA AHB……………………………………………………….......................5
2.2.1 Why we use AHB……………………………………………………………..5
2.2.2 Introducing the AMBA AHB………………………………………………….6
2.2.3 AHB Interconnection………………………………………………………….6
2.2.4 AHB arbiter…………………………………………………………………...7
2.2.5 AHB decoder………………………………………………………………….8
2.2.6 AHB Master…...………………………………………………………………9
2.2.7 AHB slave…………………………………………………………………...10
2.2.8 Basic AHB Transfer…………………………………………………………10
2.2.9 Two-cycle response……………………………………………….…………12
2.2.10 Slave transfer responses……………………………………………………14
3. Our Background of designing an AHB Verification system...…………………16
3.1 Our Motivation and Objective…………………………………………………..16
3.1.1 AHB is now popular………………………………….…….………………..16
3.1.2 The drawbacks of the verification methods we are using…….......................16
3.1.3 Cycle-based verification …………………………………………………….17
3.1.4 More usability……………………………………………………………….17
3.2 What specification we need?................................................................................18
3.2.1 See more deeply into the AHB bus operation……………………………….18
3.2.2 About the Burst operation…………………………………….......................18
3.2.3 The responses of AHB slaves……………………………………………….19
3.2.4 The method of verification we have…………………………………………20
3.2.5 The verification method or system we have known…………………………20
3.2.6 Conclusion of our survey……………………………………………………21
4. Our verification system…………………………………….……………………22
4.1 Overview………………………………………………………………………..22
4.2 How it works? …………………………………………………………….....22
4.2 How it works? .....................................................................................................22
4.3 The flow of our verification system…………………………………………….27
4.4 The advantages and characteristics……………………………………………..32
4.4.1 About the AHB simulator written in C………………………………………32
4.4.2 The characteristics of our system……………………………………………32
4.4.3 The advantages of our system……………………………………………….32
5. Conclusion……………………………………………………………………..…34
Reference…………………………………………………………………………….35

[1] Steve Furber , “ARM System-on-chip Architecture”, Second Edition , Addison-Wesley , 2000
[2] “AMBA Specification Rev2.0 “, Copyright ARM Limited.
[3] ”ARM9E-S Technical Reference Manual” , Copyright ARM Limited .
[4] Douglas J.Smith , “HDL Chip Design”, 1999
[5] IEEE Standard 1364 Verilog Hardware Description Language, 2001
[6] Luc Semeria , Abhijit Ghosh , “Methodology for Hardware/Software
Co-verification in C/C++” , 1999
[7] David A. Patterson , John L. Hennessy , “ Computer Architecture. A Quantitative Approach” , Second Edition , Morgan Kaufmann Publishers , 1996
[8] Henry Chang , Larry Cooke , Merrill Hunt , Grant Martin Andrew McNelly and lee Todd , “ Surviving the SOC Revolution : A Guide to Platform-Based Design”, Kluwer Academic Publishers
[9] 黃明權 , ”Mixed Mode Verification for 32-bit Microprocessor Core , 國立交通大學資訊工程學系碩士論文 , 2001
[10] 蘇耀群 , “ An integrated Verification System of an Embedded RISC Microprocessor with DSP Capability: , 國立交通大學資訊工程學系碩士論文 , 2001
[11] 鄭信源 , ”Verilog 硬體描述語言數位電路-設計實務”, 儒林 , 2000

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