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研究生:周明俊
研究生(外文):Ming-Chun Chou
論文名稱:針對指令階層平行爪哇處理機開發可同時執行兩個方法函式的設計
論文名稱(外文):Invoking two methods simultaneously for instruction level parallelism in Java
指導教授:鍾崇斌
指導教授(外文):Chung-Ping Chung
學位類別:碩士
校院名稱:國立交通大學
系所名稱:資訊工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:51
中文關鍵詞:Java方法呼叫超純量Java處理器指令階層平行度
外文關鍵詞:Java method invocationsuperscalar Java processorinstruction level parallelism
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Java虛擬平台的執行模式是一個堆疊架構。Java method的執行受限於方法堆疊的頂端,不同方法區塊 (method block) 的指令無法平行執行,因此高速處理的超純量Java處理器,平行度的開發受限於一個方法區塊內。我們希望打破執行的限制,一次可以同時執行兩個方法區塊的指令。
在這篇論文中,我們以兩個方法區塊可以同時存取方法框架 (method frame) 的資料為觀念,讓Java method之間有機會平行執行。這之前我們必須在方法呼叫指令未完成之前預測方法目標位址,提早讀取出被呼叫方法區塊的指令。再者,提前計算出被呼叫方法區塊使用的暫存器,以達到可同時存取被呼叫者的方法框架資料,最後,提供在這種執行模式下參數傳遞的方法來達到可同時執行兩個方法區塊。我們針對原來的指令重整緩衝區增加設計以達到可同時儲存不同方法區塊的指令,且改進後的指令重整緩衝區可提供用來檢查指令間因為傳遞參數產生的指令相依性。我們的設計使得一個超純量Java處理器可以比原本的架構在一個時脈週期內執行更多的指令。
在分析我們所提的執行架構之後,計算出我們的架構相對於傳統的架構可加速的理想上限值是2.8倍。經過實際模擬測試的結果顯示,我們設計的超純量處理器的執行效能可以比傳統的超純量處理器好1.44倍,這之間的差異在於實際參數傳遞的時機影響了下一個方法區塊可以平行執行的程度。在硬體的花費成本上我們多加了方法猜測的機制,增加指令重整緩衝區的欄位,以及需要兩份的方法暫存器,另外在指令相依性檢查單元也必須檢查出因為參數傳遞所造成的相依性指令,所以必須增加額外的電路,除此之外其他的硬體並不需要額外增加。

Execution model of Java Virtual Machine architecture is a stack-based architecture. Because execution of Java method is restricted to the top of method stack, different method blocks cannot be executed in parallel even in traditional superscalar Java processor. Exploitation of instruction-level parallelism is restricted in the range of a single method block. We will break this restriction to execute two method blocks in parallel.
In this thesis, we execute two method blocks in parallel by allowing to access method frames simultaneously. Before achieving this goal, we use method target predictor to get the start address of next method block and fetch the subsequent instructions without executing invoke instruction. In addition, method registers of next method block must be calculated early to access corresponding method frame simultaneously and we provide an argument passing mechanism for methods in order to achieve parallel execution of two methods correctly without using local variable. We also add additional design for reorder buffer to store two method blocks. The reorder buffer can be used to help to check the dependences of Java bytecode sequence due to argument passing relationship. Then, the modified superscalar Java processor can execute more instructions in parallel in a clock cycle than original superscalar Java processor.
After analyzing our architecture, we evaluate the performance maximum speedup 2.8 of our proposed architecture versus traditional superscalar Java processor. Actual simulation result shows that our proposed superscalar Java processor could achieve the performance speedup of average 1.44. The performance variation of above speedup is due to timing of argument passing and the timing influences the opportunity of execution in parallel for method blocks. In hardware cost, we add a mechanism of method target prediction, additional fields of reorder buffer, two method registers and we add additional design for dependency checking in checking dependency between methods due to argument passing. Besides, we need not add extra hardware cost.

CONTENT
摘要 i
ABSTRACT ii
誌謝 iv
CONTENT v
List of Figures vii
CHAPTER 1 INTRODUCTION 1
1.1 Java Technology 1
1.2 Execution of Java Code 1
1.3 Runtime data areas of JVM 3
1.4 Invoking a Java method 4
1.5 Observed Problem 6
1.6 Objectives and Approaches 7
1.7 Organization of This Thesis 8
CHAPTER 2 BACKGROUND 9
2.1 Method Target Prediction 9
2.2 Java Method Invocation and Return 10
2.2.1 Allocating a New Frame 10
2.2.2 Invoke a method 11
2.2.3 Return from a method 13
2.3 Superscalar Java Processor 14
2.2.1 Random access stack variables without corrupting the stack 14
2.2.2 Out-of-order execution 14
2.2.3 Dependency checking 16
2.2.4 Superscalar Java Processor Model 17
CHAPTER 3 Design of two level method invocation for Superscalar Java processor 19
3.1 Design concepts 19
3.1.1 Provide necessary method registers for speculative invoked method to access method frame 19
3.1.2 Argument passing mechanism 21
3.2 Overview of superscalar Java processor for two level method invocation 22
3.3 Pipeline Stages 23
3.4 Architecture Design 24
3.4.1 Reorder Buffer 24
3.4.2 Two method register sets 26
3.4.3 Invoked method VARS Calculation 26
3.4.4 Argument passing mechanism 28
3.4.5 Mispredicted Method Target Recovery 31
3.4.6 Retirement and Precise Exception Handling 32
CHAPTER 4 SIMULATION ENVIRONMENT AND RESULT 36
4.1 Simulation Environment 36
4.2 Benchmarks 37
4.3 Simulation Results 40
4.3.1 Analysis 40
4.3.2 Simulations of superscalar Java processor with two-level method invocation 41
CHAPTER 5 CONCLUSIONS AND FUTURE WORK 46
References 51

References
[1] J. Gosling, B. Joy, and G. Steele, The Java Language Specification, Addison-Wesley, see also http://www.javasoft.com/docs/books/jls/index.html.
[2] T. Lindholm, F. Yellin, The Java Virtual Machine Specification, Addison Wesley, 1997.
[3] Yamin Li, Xianzhu Wang, and Wanming Chu, “Javir — Exploiting Instruction Level Parallelism for JAVA Machine by Using Virtual Registers” 1998
[4] Ramesh Radhakrishnan, Juan Rubio and Lizy John, “Instruction Level Parallelism in Java”
[5] L.-C Chang, L.-R Ton, M.-F Kao, and C.-P Chung, “Stack Operations Folding in Java Processors” Computers and Digital Techniques, IEE Proceedings- , Volume: 145 Issue: 5 , Sept. 1998
[6] Radhakrishnan, R.; Talla, D.; John, L.K., “ Allowing for ILP in an Embedded Java Processor “, Computer Architecture, 2000. Proceedings of the 27th International Symposium on , 2000
[7] “ Spec JVM 98 Benchmarks “ http://www.spec.org/osg/jvm98 , 1998
[8] Mike Johnson ,Superscalar Microprocessor Design, 1991
[9] Sun Mircosystems, PicoJava-II Mircoarchitecture Guide, March 1999
[10] 喬偉豪學長,碩士論文,2000
[11] Karel Driesen, Patrick Lam, Jerome Miecznikowski, Feng Qian, Derek Rayside, “On the Predictability of Invoke Target in Java Byte code”, 2nd Internation Workshop Hardware Support for Objects and Microarchitecture for Java @ICCD2000

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