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研究生:曾海鑫
研究生(外文):H. S. Tseng
論文名稱:銅鎂接線與SiLK在多層金屬上的整合與電遷移可靠度提昇之研究
論文名稱(外文):Integration of Cu(Mg)-SiLK for Multilevel Interconnects and Promotion of Electromigration Reliability
指導教授:邱碧秀
指導教授(外文):Bi-Shiou Chiou
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:122
中文關鍵詞:電遷移結晶性時間延遲非等向性
外文關鍵詞:electromigrationcrystallinityRC time delayanisotropic
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銅鎂膜比銅對介電層的附著力佳,常壓爐管使銅產生氧化,而真空爐管真空度高,幾乎不會使金屬發生氧化。銅鎂膜比銅較能有效抵抗銅的擴散,退火後金屬的電阻率下降,另外退火後銅的結晶性也變好。真空爐管退火後,銅比銅鎂膜來的粗糙。在電遷移量測方面,以Oxide當介電材料的試片比SiLK有較佳的抗電遷移能力,銅鎂膜較銅有較佳的抗電遷移能力。金屬斷路的地方並非寬窄不一的接點,顯示熱遷移效應並不明顯。SiLK取代氧化層可使介電值下降、時間延遲減少等優點,不過也會多出一條漏電流路徑,此路徑是SiLK及氧化層的界面處,也可觀察出SiLK的非等向性現象。

The adhesion between dielectric material and Cu(Mg) is larger than Cu. Cu or Cu(Mg) will oxidize in air furnace, but won’t oxidize in vacuum furnace. Cu(Mg) can resist metal diffuse to oxide. After annealing, the resistivity of Cu or Cu(Mg) decreases and crystallinity increases. Oxide as a dielectric material has better EMD resistance than SiLK because of the higher Young’s Modulus, strength and thermal conductivity. Cu(Mg) has better EMD resistance than Cu because of the higher adhesion with dielectric material. Thermomigration is not appearing in this thesis. SiLK as a dielectric material can decrease RC time delay, but creates a new leakage current path; this path is the interface between SiLK and oxide. Anisotropic of SiLK is also observed.

第一章 簡介---------------------------------------------------1
第二章 文獻回顧-----------------------------------------------7
2-1 銅鎂膜在多層金屬接線上的整合------------------------------7
2-1-1 銅鎂膜可增加附著力--------------------------------------7
2-1-2 銅鎂膜可防止氧化以及擴散--------------------------------7
2-1-3 銅鎂膜中鎂擴散的路徑------------------------------------9
2-1-4 銅鎂膜可提高抗電遷移能力--------------------------------9
2-1-5 銅鎂膜可減少表面的粗糙度-------------------------------11
2-2 Reflow---------------------------------------------------12
2-2-1 潤溼度-------------------------------------------------12
2-2-2 GROFILMS的模擬以及reflow機制---------------------------13
2-2-3 化學機械研磨(chemical mechanical polishing, CMP)-------14
2-3 low-k材料性質探討----------------------------------------17
2-3-1 SiLK材料探討-------------------------------------------21
2-3-2 SiLK蝕刻-----------------------------------------------21
2-4 電遷移(electromigration)機制探討與量測-------------------26
2-4-1 電遷移之形成機制---------------------------------------26
2-4-2 電遷移之量測-------------------------------------------29
2-4-2-1 平均衰敗時間(MTF)法----------------------------------29
2-4-2-2 電阻改變法-------------------------------------------29
2-4-3 影響電遷移的因素---------------------------------------33
2-4-3-1 保護層-----------------------------------------------33
2-4-3-2 多層結構(黏性/擴散阻絕層)-------------------------33
2-4-3-3 接點幾何學-------------------------------------------34
2-4-3-4 應力-------------------------------------------------35
2-4-3-5氧化--------------------------------------------------36
2-4-3-6溫度--------------------------------------------------36
2-4-4 電阻對時間關係-----------------------------------------40
第三章 實驗步驟----------------------------------------------42
3-1 銅鎂合金鍍膜分析-----------------------------------------42
3-2 Reflow測試與最佳化---------------------------------------46
3-3 Lift off測試與最佳化-------------------------------------46
3-4 low-k性質探討--------------------------------------------52
3-4-1 SiLK濕蝕刻探討-----------------------------------------52
3-4-2 介電層anisotropic量測----------------------------------52
3-4-3 橫向漏電流量測-----------------------------------------52
3-5 電遷移(electromigration)機制探討與量測-------------------55
第四章 結果與討論--------------------------------------------58
4-1 銅鎂合金鍍膜分析-----------------------------------------58
4-1-1銅鎂合金鍍膜的附著力------------------------------------58
4-1-2 AES表面觀察--------------------------------------------58
4-1-3 AES縱深觀察--------------------------------------------62
4-1-4 電阻率-------------------------------------------------64
4-1-5 XRD分析------------------------------------------------65
4-1-6 EDX、ESCA、RBS觀察銅鎂成份比---------------------------65
4-1-7 表面粗糙度---------------------------------------------67
4-2 電遷移(electromigration)機制探討與量測-------------------71
4-2-1 焦耳熱-------------------------------------------------71
4-2-2 電遷移之活化能-----------------------------------------72
4-2-2-1 銅和銅鎂之比較---------------------------------------72
4-2-2-2 SiLK和SiO2之比較-------------------------------------78
4-2-2-3 加速因子---------------------------------------------81
4-3 low-k材料性質探討----------------------------------------85
4-3-1 介電層非等向性(anisotropic)機制探討與量測--------------85
4-3-1-1 介電層極化現象---------------------------------------85
4-3-1-2 anisotropic成因--------------------------------------85
4-3-1-3 垂直方向k值計算--------------------------------------86
4-3-1-4 水平方向k值評估--------------------------------------86
4-3-2 橫向漏電流機制探討與量測-------------------------------90
4-3-2-1 Liner的優缺點----------------------------------------90
4-3-2-2 不同介電材料漏電流大小比較---------------------------91
4-3-2-3 決定漏電流路徑---------------------------------------91
第五章 結論--------------------------------------------------95
參考文獻-----------------------------------------------------97
附錄--------------------------------------------------------105
1 Lift off測試----------------------------------------------105
1-1 測試變因與假設------------------------------------------105
1-2 Lift off 實際結果---------------------------------------106
2 Reflow測試------------------------------------------------111
3 SiLK濕蝕刻探討--------------------------------------------118
自傳--------------------------------------------------------122

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