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研究生:蔡仁威
研究生(外文):Ren-Wei Tsai
論文名稱:具有電場感應汲極的蕭特基阻障多晶矽薄膜電晶體之研究
論文名稱(外文):Characteristics of Schottky Barrier Polysilicon Thin-Film Transistors with Field-Induced Drain
指導教授:黃調元黃調元引用關係林鴻志林鴻志引用關係
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
中文關鍵詞:蕭特基阻障多晶矽薄膜電晶體電場感應汲極
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在本篇論文中,我們製作具有電場感應汲極的蕭特基阻障多晶矽薄膜電晶體,並研究其特性。此一元件在結構上的特性包括:利用未摻雜的多晶矽作為通道,在靠近汲極端有一段補償區、在整個元件的最上方有一用來控制補償區的副閘極以及鈷金屬矽化源/汲極。其中多晶矽通道是由準分子雷射退火或固相再結晶這兩種方法形成。
我們比較了由這兩種方法製成的元件的特性,並探討副閘極偏壓、主通道長度以及補償區長度對元件特性的影響。由準分子雷射退火製成的元件展現了絕佳的特性,包含陡峭的次臨界斜率和良好的開關電流比。同一顆元件不管操作在n型通道模式還是p型通道模式,開關電流比皆超過108。
為了探討元件的漏電流機制,我們分析了不同溫度下的漏電流。研究結果顯示熱激發放射是主要的漏電流機制。
Contents
Abstract (in Chinese)…..………………………………………………..……i
Abstract (in English)…..…………………………………………...………..iii
Acknowledgement………………………………………………………..……v
Contents………………………..……………………………………….…......….vi
Table Captions.……….…..………………………………………….……….viii
Figure Captions…….…..…………………..…….………..…………..…..…..ix
Chapter 1 Introduction
1.1 Background and Motivation ……………………………………..…………..1
1.2 Thesis Organization ………………………………………………..……...…3
Chapter 2 Experiments
2.1 Device Structure and Fabrication ………...…………………....…………….4
2.2 Electrical Characterization ……...……….……..……………………………7
Chapter 3 Characteristics of SBTFTs with
Field-Induced Drain (FID)
3.1 Transfer Characteristics of SBTFTs with FID…………...…………………..8
3.2 Effects of Sub-Gate Bias..……………….…………...……………………..11
3.3 Effects of Main-Channel Length………………....…...…...………………..12
3.4 Effects of Offset Channel Length…………………………………………...12
Chapter 4 Conduction Mechanisms for Off-state Leakage
4.1 Devices with Excimer-Laser-Annealed (ELA) Channel……………………14
4.2 Devices with Solid-Phase-Crystallized (SPC) Channel…………………….16
Chapter 5 Conclusions and Suggestions for Future Work
5.1 Conclusions..…………..……………………………………………………18
5.2 Future Work………………………………..………………………………..19
Reference……………………………………………………..………………….20
Table………………………………………………….……………………………24
Figure…………………………………..………………………….………………25
Vita………………………………………...……………………….………………44
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[8] W. Saitoh, A. Itoh, S. Yamagami, and M. Asada, “Analysis of Short-Channel Schottky Source/Drain Metal-Oxide-Semiconductor Field-Effect Transistor on SOI Substrate and Demonstration of Sub-50 nm N-type Device with Metal Gate,” Jpn. J. Appl. Phys., Vol.38, pp. 6226-6231, 1999.
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[10] M. Nisisaka, Y. Ochiai, and T. Asano, “Pt-Si Source and Drain SOI-MOSFET Operation in Bi-Channel Mode,” in Proc. Device Res. Conf. (DRC), 1998, pp. 74-75.
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[12] H. C. Lin, C. Y. Lin, K.L. Yeh, R.G. Huang, M.F. Wang, C.M. Yu, T. Y. Huang, and S. M. Sze, “A Novel Implantless MOS Thin-Film Transistor with Simple Processing, Excellent Performance and Ambipolar Operation Capability,” IEDM Tech. Dig., 2000, pp. 857-859.
[13] H. C. Lin, K.L. Yeh, R.G. Huang, and T. Y. Huang, “Schottky Barrier Thin-Film Transistor (SBTFT) with Silicided Source/drain and Field-Induced Drain Extension,” IEEE Electron Device Lett., vol. 22, pp. 179-181, 2001.
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[20] B. Winstead, U. Ravaioli, “Simulation of Schottky Barrier MOSFETs with a Coupled Quantum Injection/Monte Carlo Technique”, IEEE Trans. Electron Devices, vol. 47, pp. 1241-1246, 2000.
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