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研究生:曾曉琪
論文名稱:多孔性極低介電常數材料之平坦化製程整合研究
論文名稱(外文):Investigation on planarization process integration of porous low dielectric constant (K<=2.2) material
指導教授:施 敏張鼎張
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
中文關鍵詞:多孔性低介電常數材料平坦化漏電機制與銅的可靠性
外文關鍵詞:porous ultra low-kCMPleakage mechanismreliability
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隨著半導體技術的進步,元件的尺寸不斷的縮小,電子訊號在金屬導線間傳遞所造成的延遲,變成半導體元件速度受限的主要原因。為了降低訊號傳遞的時間延遲,使用低介電常數材料作為導線間的絕緣層,便可降低導線間的電容值,使元件在速度方面的性能提高,並且可以降低功率的消耗(power dissipation)及雜訊干擾(cross-talk noise)。但是多孔性低介電常數材料的機械強度一般來說都較緻密的材料差,因此在平坦化製程整合上將面臨重大的考驗。
在本論文中,將探討平坦化製程對多孔性的二氧化矽(PPSZ-M)薄膜的影響,結果顯示3種不同的研磨液都不會造成介電特性上的劣化。然而由於研磨速率太慢,我們也提出利用氧電漿的前置處理來增進研磨速率,氧電漿雖然會造成介電特性上的劣化,但CMP後,由於損壞層已被磨除,所以介電特性會恢復。最後,我們更對介電材料的漏電機制及其與銅的可靠性加以研究,使用不同的研磨液CMP後,其漏電機制是Schottky-like,而氧電漿處理後則為ionic conduction,不過CMP後則恢復成Schottky-like。至於銅的可靠性研究,我們發現不論經由任何CMP製程處理,都不會降低PPSZ-M的抗銅能力。由這些結果可知薄膜在製程整合上是極具發展力。
As ULSI circuits are scaled down to deep submicron regime, interconnect delay becomes increasingly dominant over intrinsic gate delay. To reduce the RC delay time, many low dielectric constant materials have been developed. However, the mechanical strength of porous low k materials is worse than that of dense materials. For process integration considerations, we will investigate the impacts of CMP (chemical mechanical polish) on electrical characteristics of porous dielectrics..
In this thesis, we will investigate the impacts of the CMP process with various slurries on the ultra low-k PPSZ-MTM (porous Methylsilsesquiazane). The dielectric characteristics are not degraded after three kinds of slurry treatment. In parallel, a novel oxygen plasma pre-treatment has been proposed in order to increase the polish rate of the ultra low-k PPSZ-M for the duration of CMP process. O2 plasma treatment can convert PPSZ-M surface from hydrophobic into hydrophilic. The hydrophilic surface can increase the reaction rate between PPSZ-M and chemical slurry during CMP process, resulting in the increase of CMP polish rate. Furthermore, it is found that the dielectric characteristics of O2 plasma-treated PPSZ-M after CMP process are similar to that of the as-cured PPSZ-M. As a result, O2 plasma pre-treatment has an extreme potential in the future IC fabrication.
In addition, we have also explored the leakage mechanism of the PPSZ-M after the CMP process and the reliability issue related to copper penetration in porous silica film. The leakage mechanism of the O2 plasma-treated PPSZ-M is the ionic conduction. After the CMP process, the leakage current behavior transform from ionic conduction to Schottky-like mechanism. Under the high temperature and bias stress, the electrical characteristics are still not degraded. Consequently, the integration between PPSZ-M and CMP has extreme potential in the new generation of the ICs.
Contents
Abstract (Chinese) ……………………..………………………….……i
Abstract (English) …………………………………………………….ii
Acknowledgment (Chinese) …………………………………….……iv
Content ………………………………………………….………………v
Table Captions ……………………………………………….……….vii
Figure Captions ……………………………………………………...viii
Chapter.1 Introduction
1.1 General Background……………………..……………….1
1.2 Motivation and Material Options………………………3
1.3 Outline………………………...……………………………4
Chapter.2 Experimental Procedure
2.1 Deposition………..………………………………………7
2.2 CMP Process……………..…………………………….7
2.3 The Approach of Increasing CMP Removal
Rate……………………………………………………………8
2.4 Reliability of post-CMP…………………………………9
Chapter.3 Impacts of the CMP Process with Various Slurries on the Ultra Low-k PPSZ-M
3.1 Introduction.…………………………………………….11
3.2 Results and Discussion…………………………………13
3.3 Summary……………………………………………………18
Chapter.4 The Approach of Increasing the Removal Rate of the
CMP Process with O2 plasma Pre-treatment
4.1 Introduction………………………………………………19
4.2 Results and Discussion……………………………….20
4.3 Summary………………………………………………….26
Chapter.5 Conclusion and suggestion for future work
5.1 Conclusion……………………………………………….28
5.2 Future work………………………………………………30
References…………………………………………………………31
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