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研究生:林明昭
研究生(外文):Lin Ming-Chao
論文名稱:鐵電記憶元件製程及特性之研究
論文名稱(外文):Investigation of metal/ferroelectric/metal/insulator/semiconductor Structure's Process and Properties
指導教授:曾俊元
指導教授(外文):T. Y. Tseng
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:73
中文關鍵詞:鐵電記憶體記憶窗
外文關鍵詞:ferroelectricMFMISSBTBITSTOmemory window
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現今商業化的一電晶體一電容鐵電記憶體在讀取上是具有破壞性的。本實驗直接探討非破壞性結構的製程條件與特性。一系列的參數模擬被應用來導引實驗方向,並以SBT和BIT兩種鐵電材料探討在不同回火溫度處理下的電學特性及比較,”金屬-鐵電膜-金屬-絕緣層-矽基板”結構被應用來調變鐵電電容與絕緣層電容的比值,以加強在低操作電壓下記憶窗的寬度,並以模擬結果相互映證;同時嘗試以高介電鈣鈦礦結構的STO材料取代二氧化矽絕緣層,進一步增強低電壓操作的可能行,最後探討此結構以及STO材料整體的可靠度特性。

At the present time, the commercial 1T1C(1 transistor 1 capacitor) ferroelectric memory is a destructive readout. Our experiments here directly investigate the process conditions and characteristics of non-destructive structure. A sequence of parameter simulations has been utilized to guide the experiments. The electrical properties and comparison of ferroelectric materials, including SBT and BIT, are investigated under different annealing conditions. To enhance the memory window under low voltage operation, “metal/ferroelectric/metal/ insulator/semiconductor” structure is utilized to adjust the ratio of ferroelectric and insulating capacitance and verified with simulation results. Meanwhile, for the reason of further probability to achieve low voltage operation, STO material with high-k perovskite structure is used to replace the traditional SiO2 insulator. Finally, the reliability properties of the structure and STO material are investigated.

中文摘要 i
Abstract ii
Acknowledgment iii
Contents iv
List of figures vii
List of tables ix
Chapter 1
Introduction 1
1-1 Motivation 1
1-2 Overview of ferroelectric memory 2
1-3 Survey of MFIS and MFMIS structure 5
1-4 Thesis Organization 6
Reference 8
Chapter 2
Characteristics of ferroelectrics 10
2-1 Ferroelectricity 10
2-1.1 Dielectric and ferroelectric theory 13
2-1.2 Ferroelectric characteristic and measurement 13
2-2 Ferroelectric memory 16
2-2.1 Types of ferroelectric memory 16
2-2.2 Operation mechanism 18
2-2.3 Scaling Rules of Ferroelectric Memories 23
2-3 Reliability Issues 25
2-3.1 Fatigue 25
2-3.2 Polarization Relaxation 27
2-3.3 Imprint 28
2-3.4 Leakage current 29
Reference 30
Chapter 3
Experimental details 32
3-1 The process of MFIS and MFMIS structure 32
3-2 Preparation of ferroelectric film 34
3-3 Physical and Electrical Characterization Techniques 34
1. n&k analyzer 34
2. X-Ray Diffraction Analysis (XRD) 36
3. Atomic force microscopy (AFM) 36
4. Scanning Electron Microscopy(SEM) 36
5. Transmission Electron Microscope(TEM) 36
6. Current-voltage (I-V) measurements 37
7. Capacitance-voltage (C-V) measurements 37
8. Fatigue Meausrements 37
Chapter 4
Results and discussion 38
4-1 Comparison of ferroelectric properties of SBT and BIT 38
4-2 Effect of annealing conditions on the properties of ferroelectrics 42
4-3 Area adjustment in MFMIS structure 51
4-4 Effect of insulator materials and thickness 62
4-5 Reliability test 65
Reference 70
Chapter 5
Conclusions and future work 72

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