臺灣博碩士論文加值系統

在超大型積體電路技術的可靠度議題研究中，超薄閘極氧化層的介電崩潰一直是個重要的研究方向。
本篇論文中，我們提出了一個一致的模型來解釋因時變化介電崩潰的物理機制，這個模型結合了現有的陽極電動穿遂模型以及本實驗室提出的蒙第卡羅球體統計模型。一般相信，氧化層陷阱的產生是由於高能電子撞擊游離產生的電子電動洞對中的電洞受到氧化層電場的吸引穿過氧化層所造成。當氧化層中，球型陷阱堆疊形成一連接兩端接面的通道時，介電崩潰發生，此時，中性電子陷阱的密度可由球體統計模型來量化。我們發現，陷阱密度在氧化層厚度小於2.7奈米之後是一個常數值。因此，我們可以模擬出不同氧化層厚度下達到介電崩潰所需的電子密度對氧化層電場的數值。

The dielectric breakdown of ultrathin gate oxides in metal-oxide-semiconductor field-effect-transistors (MOSFETs) is an important reliability issue in ULSI (Ultra Large Scale Integration) technology.
A consistent model for intrinsic time-dependent dielectric breakdown (TDDB) of thin oxide is introduced. This model links the existing anode hole injection model and the trap generation statistical model together and describes wearout as a hole induced generation of electron traps. Breakdown in thin oxide is defined as conduction via these traps from one interface to the other, as soon as a critical density of neutral electron traps in the oxide is reached. We will show that neutral electron trap density saturates to a constant for gate oxide thickness less than 2.5nm as well as predict the oxide thickness dependence of QBD distribution.

Content
Abstract (Chinese)……………………………………i
Abstract (English) …………………………………ii
Acknowledgement………………………………………iii
Content…………………………………………………iv
Figure Captions………………………………………v
Chapter 1 Introduction……………………………1
Chapter 2 Sphere Model……………………………3
Chapter 3 Quantum Yield ( VG > 0 )……………6
Chapter 4 Improved Anode Hole Injection Model ( VG > 0 )………………………………………………………….10
Chapter 5 Conclusion……………………………14
References……………………………………………15
vita

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