(3.238.7.202) 您好!臺灣時間:2021/03/02 00:24
字體大小: 字級放大   字級縮小   預設字形  
回查詢結果

詳目顯示:::

我願授權國圖
: 
twitterline
研究生:黃糸秀娟
研究生(外文):Huang Hsiu Chuang
論文名稱:具有低介電係數阻障介電層的研究
論文名稱(外文):Study on low-k barrier dielectric
指導教授:曾俊元張鼎張
指導教授(外文):Tseung Yuen TsengTing Chang Chang
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:57
中文關鍵詞:低介電係數阻障介電層碳化矽
外文關鍵詞:low-kbarrier dielectricsilicon carbide
相關次數:
  • 被引用被引用:0
  • 點閱點閱:174
  • 評分評分:系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔系統版面圖檔
  • 下載下載:0
  • 收藏至我的研究室書目清單書目收藏:0
本論文研究積體電路製造技術中的多層導體連線製程。隨著半導體技術的進步,元件的尺寸也不斷地縮小,而多層金屬導體連線的設計,也成為超大型積體電路技術所必須採用的方式。然而,隨著金屬導線層的數目增加及導線間的距離不斷縮小,電子訊號在金屬連線間傳送時,金屬連線的電阻-電容延遲時間(RC delay time),變成半導體元件速度受限的主要原因。為了降低訊號傳遞的時間延遲,現今已經發展以金屬銅(電阻率為1.7μΩ-cm)來取代金屬鋁(電阻率為2.7μΩ-cm)成為導線的連線系統。而在降低電容方面,則朝向低介電常數 ( low-k ) 材料發展。但是在銅與鑲嵌的製程與電性操作的環境下,溫度與電場的作用,銅極易擴散至低介電常數材料中,並與之發生反應,造成材料特性的劣化與漏電流增大,甚至導致介電質崩潰。因此,在符合製程相容性要求的前提之下,發展具抗銅金屬擴散特性的介電阻障層材料,便成為重要的研究課題。
目前一種碳化矽(silicon carbide)材料薄膜,具有低的介電係數(k~4),因此受到廣大的矚目,而被應用於介電阻障層技術中,用來取代傳統具高介電係數的氮化矽(silicon nitride) (k~8),以降低導線系統的延遲時間。本論文將討論碳化矽膜的材料基本特性,以及其在製程整合時會遇到的一些問題,例如氧電漿與熱退火處理對碳化矽膜的影響;除此之外並研究其與銅或鋁導線整合時,所衍生的電性問題,並探討其漏電流的機制。

In the era of deep submicron semiconductor fabrication, interconnect resistance-capacitance (RC) delay dominates the performance of whole integrated circuits (ICs). To mitigate the issue, two realistic methods are accepted popularly. The first method is to replace the aluminum wires with copper interconnects which offer lower resistivity. The second method is to use a lower dielectric constant material as the inter-metal dielectric (IMD). However, some difficulties come up in integrating low-k material with copper wires, including dielectric integrity and high diffusivity of copper ions. In order to prevent copper from penetrating into dielectric material under both high electric fields and operation temperature, barrier dielectric have been developed to enhance resistance to copper drift.
Silicon carbide (SixCy) with lower dielectric constant (k~4) is a promising barrier dielectric material to replace typically used silicon nitride (SixNy), (k~8). In this study, we will discuss the basic material properties of silicon carbide, such as FTIR, AES, SIMS and XPS analysis. It’s investigated that the properties of nitrogen-doped silicon carbide are much better than those of pure silicon carbide. Moreover, the electrical characteristics remain stable after O2-plasma ashing, thermal treatment and even BTS (bias-temperature-stress) in high electric field (up to 4MV/cm, 150oC, 1000 sec). These treatments are frequently implemented will be faced in the fabrication process. It’s also demonstrated clearly that the more nitrogen concentration of silicon carbide, the better barrier ability against copper diffusion. Finally, we find that the leakage behavior of silicon carbide is Poole-Frenkel transport which is similar to conventional amorphous silicon nitride film.

Contents
Abstract (Chinese) ……………………..………………………….……i
Abstract (English) …………………………………………………….ii
Acknowledgment (Chinese) …………………………………….……iv
Content ………………………………………………….………………v
Table Captions ……………………………………………….……….vii
Figure Captions ……………………………………………………...viii
Chapter.1 Introduction
1.1 General Background……………………..……………….1
1.2 Motivation and Material Options…………………………3
1.3 Organization of This Thesis……………………………4
Chapter.2 Characteristics of Silicon Carbide Film
2.1 Introduction………………………………………………8
2.2 Experimental Procedure………………………………….9
2.3 Results and discussion…………………………………10
2.4 Summary…………………………………………………12
Chapter.3 Electrical characterization of silicon carbide
3.1 Introduction.…………………………………………….22
3.2 O2-plasma ashing Damage Effect……………………23
3.3 Thermal Annealing Effects upon Silicon Carbide…….25
3.4 Electrical Property of Silicon Carbide………………….26
Chapter.4 BTS measurement of silicon carbide
4.1 Introduction………………………………………………40
4.2 Experimental Procedure……………………………….41
4.3 Results and discussion………………………………….42
4.3-1 Electric characteristics during and after BTS……….42
4.3-2 Material analysis after BTS…………………………..43
Chapter.5 Conclusion and suggestion for future work
5.1 Conclusion……………………………………………….50
5.2 Future work………………………………………………51
References…………………...…..……………………………………52
Vita…………..………………………………………………………….57

[1] L. peters, “Pursuing the perfect low-k dielectric”, Semiconductor International, vol. 21, no. 10, Sept. pp.64 (1998).
[2] P. T. Liu, T. C. Chang, Y. L. Yang, Y. F. Cheng and S. M. Sze, IEEE Trans. on Electron Devices 47, pp.1733, (2000).
[3] G. Deltoro, N. Sharif, in : Internal electronic manufacturing technology symposium, pp.185 (1999).
[4] M. Rossnegal and D. Mikalsen, “Collimated magnetron sputter deposition”, J. Vac. Sci. Technol., A-9, pp.261 (1991).
[5] T. Sakurai, “Closed-form expressions for interconnection delay, coupling and crosstalk in VLSI’s”, IEEE trans. Elec. Devices, 40, pp.118 (1993).
[6] T. H. Lee, “Nitridation effect on the barrier property of Mo and Cr layer in Cu/barrier/SiO2/Si MOS structure”, Master Thesis, National Chiao-Tung University, Hsinchu, Taiwan, (1997).
[7] J. D. Mcbrayer, R. M. Swanson, and T. W. Sigmon, J. Electrochem. Soc., vol. 133, no. 6, pp. 1242-1246, 1986.
[8] Y. S. Diamand, A. Dedhia, D. Hoffstetter, and W. G. Oldham, J. Electrochem. Soc., vol.0140, no. 8, pp. 2427-2432, (1993).
[9] A. L. S. Loke, C. Ryu, C. P. Yue, J. S. H. Cho, and S. S. Wong, IEEE Electron Device Lett,. Vol. EDL-17, pp. 549-551, Dec. (1996).
[10] D. Gupta, Mater.., Res. Soc. Sym. Proc, vol. 337, pp. 209-215, (1994).
[11] S. M. Sze, Physics of Semiconductor Devices, 2nd ed, p. 402, John Wiley & Sons, New York, (1981), Chap. 6-8.
[12] T. B. Massalski, Editor-in-Chief, Binary Alloy Phase Diagrams, 2nd ed. Material Park, OH: ASM Int., (1990).
[13] A. Cros, M. O. Aboelfotoh, and K. N. Tu, J. Appl. Phys., vol. 67, no. 7, pp. 3328-3336, (1990).
[14] L. Stolt and F. D’heurle, Thin Solid Films, vol. 189, pp. 269-274, (1990).
[15] J. Echigoya, H. Enoki, T. Satoh, T. Waki, M. Otsuki, and T. Shibata, Appl. Surf. Sci., vol. 56-58, pp. 463-468, (1992).
[16] M. Vogt, M. Kachel, K. Drescher, “Dielectric Barrier for Cu Metallization System”, Materials for Avanced Metallization, pp.51, (1997).
[17] M. Vogt, M. Kachel, K. Drescher, “Dielectric Barrier for Cu Metallization System”, Microelectronic Engineering, pp.181-187, (1997).
[18] M. Vogt, M. Kachel, K. Drescher, ”Dielectric barrier for Cu metallization systems”, Material for Avanced Metallization, pp.51-52, (1997).
[19] Masayuki Tanaka, Shigehiku Saida, Tadashi Lijima and Yoshitaka Tsunashima, “Low-k SiN films for Cu interconnects integration fabricated by ultra low temperature thermal CVD”, Symposium on VLSI Technology Digest of Technical Papers, pp.47-48, (1999).
[20] M. J. Loboda, “New solutions for intermetal dielectrics using trimethylsilane-based PECVD processes”, Microelectronic Engineering 50, pp.15-23, (2000).
[21] Byung Keun Hwang, Mark J. Loboda, Glenn A. Cerny, Ryan F. Schneider, Jeff A. Seifferly and Tom Washer, “The characterization of trimethylsilane based PE-CVD a-SiCO:H low-k films” IEEE, (2000).
[22] Takeshi Furusawa, Noriyuki Sakuma, Daisuke Ryuzaki, Seichi Knodo, Ken-Ichi Takeda, Shun-taro Machida and Kenji Hinode, “Simple, reliable Cu/low-k interconnect integration using mechanically strong low-k dielectric material : silicon-oxycarbide”, IEEE (2000).
[23] Ping Xu, Kegang Huang, Anjana Patel, Sudha Rathi, Betty Tang, John Ferguson, Judy Huang and Chris Ngai, “BLOKTM - a low-k dielectric barrier/etch stop film for copper damascene applications”, IITC, pp.109-111, (1999).
[24] F. Lanckmans, K. Maex, “Use of a capacitance voltage technique to study copper drift diffusion in (porous) inorganic low-k material:, Microelectronic Engineering 60 (2002), pp.125-132
[25] G. Constantindis, “Processing technologies for SiC”, IEEE (invited paper), pp.161-170, (1997).
[26] J. Huran, L. Hrubcin, A. P. Kobzev and J. Liday, “Properties of amorphous silicon carbide films prepared by PECVD”, Vacuum, volume 47/no. 10, pp. 1223-1225, (1996).
[27] Dong S. Kim, Young H. Lee, “Annealing effects on a-SiC:H(F) thin films deposited by PECVD at room temperature”, Thin Solid Film, 261, pp.192-201, (1995).
[28] Soo Geun Lee, Yun Jun Kim, Seung Pae Lee, Hyeok-Sang Oh, Seung Jae Lee, Min Kim, Il-Goo Kim, JaeHak Kim, Hong-Jae Shin, Jin-Gi Hong, Hyeon-Deok Lee and Ho-Kyu Kang .“Low dielectric constant 3MS -SiC:H as Cu diffusion barrier layer in Cu dual damascene process”, Jpn. J. Appl. Phys. Vol.40 pp.2663-2668, Part.1, No.4B, April 2001.
[29] A. TaBata, Y. Kuno, T. Suzuoki, Y. Mizutani, J. Non-Cryst. Solids, 1043 pp.164-166, (1993).
[30] F. Demichelis, G. Crovini, F. Giorgis, C. F. Pirri, E.Tresso, Diamond Rel. Mater. 4 (1995), pp.473.
[31] V. Chu, N. Barradas, J. C. Soares, J. P. Conde, J. Jarego, P. Brogueira, J. Rodriguez, J. Appl. Phys. 78 (5), pp. 3164, (1995)
[32] H. Wieder, C. R. Cardona, M. Guarnieri, Phys. Stat. Sol. B92 (1979), pp. 99.
[33] R. A. C. M. van Swaaij, A. J. M. Berntsen, W. G. J. H. M. van Sark, H. Herremans, J. Bezemer, W. F. van der Weg, J. Appl. Phys. 76 (1), pp.251. (1994).
[34] M. T. Kim, J. Lee, Thin Solid Films, 303, pp.173. (1997).
[35] S. Sahli, Y. Segui, S. Hadj, Moussa, M. S. Djouadi, Thin Solid Films 217, pp.17, (1992).
[36] Y. Katayama, K. Usami, T. Shimada, Phxilos. Mag. B 43 (2), pp.283. (1981).
[37] Yoshimaru, M.; Koizumi, S.; Shimokawa, K.; Ida, J. Reliability Physics Symposium, 1997. 35th Annual Proceedings., IEEE International, pp.234 -241, (1997).
[38] P. T. Liu, T. C. Chang, S. M. Sze, F. M. Pan, Y. J. Mei, W. F. Wu, M. S. Tsai, B. T. Dai, C. Y. Chang, F. Y. Shih and H.D.Huang, Thin Solid Films 332, 345 (1998).
[39] P. T. Liu, T. C. Chang, H. Su, Y. S. Mor, Y. L. Yang, Henry Chung, J. Hou and S. M. Sze, J. Electrochem. Soc. 148 (2), F30 (2001).
[40] Jui-Chang Chuang, Mao-Chien Chen, J. Electrochem. Soc. 145, pp.4029, (1998).
[41] Jui-Chang Chuang, Mao-Chien Chen, J. Electrochem. Soc. 145, pp.3137, (1998).
[42] J. G. Simmons, in L. I. Maissel and R. Glang (Eds.), Handbook of Thin Film Technology, Chap. 14, pp. 25, McGraw-Hill, New York, (1970).
[43] P. Hesto, in: G. Barvotlin, A. Vapaille (Eds.), Instabilities in Silicon Devices, Ch. 5, vol. 1, pp.263, North-Holland, Amsterdam (1986).
[44] J. G. Simmons, in L. I. Maissel and R. Glang (Eds.), Handbook of Thin Film Technology, Ch. 14, pp. 28, McGraw-Hill, New York (1970).
[45] S. M. Sze, Physics of Semiconductor Devices, Ch. 7, pp. 402, Wiley, New York (1981).
[46] P. T. Liu, T. C. Chang, M. C. Huang, Y. L. Yang, Y. S. Mor, M. S. Tsai, H. Chung, J. Hou and S. M. Sze, Journal of The Electrochemical Society, 147 (11) 4313-4317, (2000).
[47] Kawakami, N.; Fukumoto, Y.; Kinoshita, T.; Suzuki, K.; Inoue, K.-I., Interconnect Technology Conference, Proceedings of the IEEE 2000 International , pp.143 —145, (2000).
[48] Y. Shacham-Diamand, A. Dedhia, D. Hoffstetter, and W. G. Oldham, “Copper transport in thermal SiO2 ,” J. Ecectrochem. Soc., vol. 140, no. 8, pp. 2427-2432, (1993).
[49] J. S. H. Cho, H.-K.Kang, C. Ryu, and S. S. Wong, “Reliability of CVD Cu barrier interconnections,” IEDM Tech. Dig., pp. 265-268, (1993).
[50] C. Chiang, S.-M. Tzeng, G. Raghavan, R. Villasol, G. Bai, M. Bohr, H. Fujimoto, and D. B. Fraser, “Dielectric barrier study for Cu metallization,” Proc. VLSI Multilevel Interconnection Conf., pp. 414-420, (1994).

QRCODE
 
 
 
 
 
                                                                                                                                                                                                                                                                                                                                                                                                               
第一頁 上一頁 下一頁 最後一頁 top
系統版面圖檔 系統版面圖檔