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研究生:林旭益
研究生(外文):Shiuyi Lin
論文名稱:高頻CMOS元件基板SPICE模型建立
論文名稱(外文):RF CMOS Substrate Modeling in Spice
指導教授:莊紹勳
指導教授(外文):Steve S. Chung
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
中文關鍵詞:基版模型
外文關鍵詞:substrate model
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當矽晶氧半場效電晶體(MOSFET)的通道長度不斷縮短下,其高頻特性將獲得極大的改善。然而,它的模組也將變得更為複雜。尤其是來自基板的藕合效應將會更嚴重。故一個先進的射頻模組高頻模組,要能考慮到基板藕合所造成的各方面影響,才能在大範圍的操作偏壓,準確預估元件的高頻行為。
在本研究論文中,我們先從理論去描述矽半導體基板的物理模型,並藉由模擬來驗證。基於此理論,我們首次發展一個具物理意義的基板模型。此模型是以可微縮的基板電阻與基板電容並聯形成,與傳統僅用電阻的模型大不相同。雖然此模型看似更複雜化了基板,但此電阻電容存在一個固定不變的關係,使得我們從量測數據要萃取基板參數仍有理可循。而此並聯的電容,將對基板的高頻行為有很大的影響。
除此之外,針對此新基板模型,我們重新討探基板電阻的偏壓性與幾何尺寸的特性。依照分析結果,我們還可進一步地將基板電阻分成二個部份。一個是從汲極下方電容往源極所看到的電阻,另一個是往基板接點所看到的電阻。此二電阻會表現出不同的偏壓特性,也有不同的微縮特性。最後將此模型驗證在元件高頻雜訊分析上,並比較此模型與傳統模型的不同。由於此並聯基板電容的影響,來自基板雜訊將會隨頻率增加而變小。結果顯示此模型在高頻處也能較準確地預測元件雜訊行為。
總而言之,本論文所提出的基板模型,不但在理論上具有物理意義,而且能更精確預測元件的高頻行為,有助於射頻積體電路設計的電路模擬用途。

As the gate length of a MOSFET reduces, its high-frequency characteristics can be greatly improved. However, its model becomes more complicate. Especially, the effect of substrate coupling is getting more serious. An advanced RF model by considering substrate coupling effects in every aspects is needed to accurately describe the RF behavior of device over a wide bias ranges.
In this thesis, first, we describe the physics of silicon substrate from the theory, and verify its correctness from simulation. Then, a physical-based substrate model is developed. The substrate is modeled by a scalable resistance and capacitance in parallel. The model is far from conventional models. It seems that the substrate model is more complicated. But there is a constant relationship between the substrate resistance and capacitance, and this makhe es sense of extracting substrate parameters from measured data. The capacitance has a great influence on the device RF behavior.
According to this model, we examined the bias and geometry dependence of MOSFET. From the analysis, we can further divide substrate resistance into two parts:Rdsb , which is seen from Cdb toward source, and Rdb, which is seen from Cdb toward bulk contacts. These two resistances show different dependence of the drain bias. Finally, the model is verified in RF noise analysis, and compared with conventional models. The results show that substrate noise well be reduced by the parallel capacitance in the substrate at high frequency. This new model can predict better accuracy in higher frequencies than conventional models.
In summary, the proposed substrate model is not only physically-based but also can be used to predict accurately the RF behavior of device. Moreover, the presented model is well-suited for the RF circuit simulation.

Contents
Chinese Abstract i
English Abstract iii
Acknowledgements v
Contents vi
Figure Captions viii
List of Symbols xi
Chapter 1 Introduction 1
1.1 The Motivation of This Work 1
1.2 Organization of This Thesis 1
Chapter 2 The Substrate Dielectric Model 3
2.1 The Theory and the Dielectric Model 3
2.2 The Silicon Substrate Model 6
2.3 Simulation Results 6
2.3.1 N-type Silicon Substrate 6
2.3.2 P-type Silicon Substrate 13
2.4 Discussion 13
Chapter 3 RF Measurement and De-embedding 20
3.1 S Parameters Measurement 20
3.2 Open Dummy and Measurement 23
3.2.1 Equivalent Circuit 23
3.2.2 Y-parameter of Open Dummy Pad 23
3.3 Noise Measurement and De-embedding 29
3.3.1 Noisy Two-port 29
3.3.2 Noise De-embedding 32
Chapter 4 The High Frequency Substrate Model of MOSFET 37
4.1 Extraction of RF CMOS Parameters 37
4.1.1 Inductance Elements 37
4.1.2 The MOSFET Model 39
4.1.3 Substrate Network Extraction 43
4.2 Dependence of Rsub 45
4.2.1 Frequency Dependence of Rsub 45
4.2.2 Fingers Dependence of Rsub 48
4.2.3 Geometry Dependence of Rsub 48
4.2.4 Bias Dependence of Rsub 52
4.2 Physical Model of Rsub 56
Chapter 5 The Noise Model of MOSFET 59
5.1 The Noise Model 59
5.2 Comparison with Experiments 63
Chapter 6 Summary and Conclusion 69
References

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