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研究生:徐利君
論文名稱:用於PRML讀取通道之七階低通濾波器
論文名稱(外文):A seventh-order low pass filter for PRML read channel
指導教授:吳錦川
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
中文關鍵詞:filterintegrator
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本篇論文描述一個利用電流模式設計之低電壓低通濾波器。利用電流模式積分器組成一個Biquad電路,使截止頻率提升為680百萬赫茲,一般的Biquad電路主要由兩個區塊所組成,分別為lossy 及lossless差動積分器,可藉由改變偏壓電流來改變濾波器的截止頻率。此電路在2.5伏特的電源下工作,其消耗功率約為3.76毫瓦。使用0.25微米互補金氧半製成。
Low voltage CMOS low pass filter using current-mode techniques is presented. The 680NHz cutoff frequency is achieved by using current-mode integrator as a building block of the current-mode biquad. A universal biquad is constructed from two basic building blocks, lossless and lossy differential current-mode integrators. Tuning of the biquad is obtained by changing the bias currents. The power consumption is 3.76mW with 2.5V supply voltage. The chip is fabricated in 0.25μm CMOS process.
Table of Contents
Abstract (Chinese) i
Abstract (English) ii
Table of Contents iii
List of Figures v
List of Tables vii
CHAPTER1 INTRODUCTION………………………………………..1
1.1 MOTIVATION………………………………….………1
1.2 THESIS ORGANIZATION……………………………………..3
CHAPTER2 SYSTEM ARCHITECTURE…………………………...4
2.1 ANALOG FILTER……………………………………………...4
2.2 DIGITAL FILTER……………………………………….5
CHAPTER3 CURRENT-MODE INTEGRATOR……………………7
3.1 INTRODUCTION TO CURRENT-MODE CIRCUIT…………………7
3.2 THE FIRST CURRENT CONVEYOR………………………………8
3.3 THE SECOND CURRENT CONVEYOR……………………………9
3.4 A BASIC CIRCUIT REALIZATION OF CCⅡ…………………10
3.5 LOSSY CURRENT-MODE INTEGRATOR…………………………11
3.6 LOSSLESS CURRENT-MODE INTEGRATOR……………………13
CHAPTER4 CIRCUIT DESIGN AND SIMULATION……………17
4.1 BIQUAD CIRCUIT………………………………………17
4.2 SIMUALTION RESULT OF BIQUAD CIRCUIT…………………20
4.3 SENENTH-ORDER FILTER……………………………………21
4.4 BOOST FUNCTION…………………………………………25
CHAPTER5 NONIDEAL EFFECT…………29
5.1 MISMATCH……………………………………………………29
5.1.1 Mismatch of lossy integrator……………30
5.1.2 Mismatch of lossless integrator………31
5.1.3 Mismatch of seventh-order filter………33
5.2 ACCURACY OF THE CAPACITANCE……………………………33
CHAPTER6 CONCLUSION………………39
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[3] Sterling L. Smith and Edgar Sanchez-Sinencio, “Low voltage integrators for high-frequency CMOS filters using current mode techniques,” IEEE Trans, Circuits and Systems, vol.43, pp.39-48, January 1996.
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[5] Francesco Rezzi, Ivan Bietti, Marco Cazzaniga, and Rinaldo Castello, “A 70mW seventh-order filter with 7-50MHz cutoff frequency and programmable boost and group delay equalization,” IEEE J.Solid-State Circuits, vol.32, pp.1987-1999, Dec.1997.
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[10] Caesar S. H. Wong, Jacques C. Rudell, Gregory T. Uehara, and Paul R. Gray, “A 50-Mhz eight-tap adaptive equalizer for partial-response channels,” IEEE J.Solid-State Circuits, vol.30, March, 1995.
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