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研究生:羅友成
研究生(外文):You-Cheng Luo
論文名稱:第三代寬頻分碼多工存取系統基頻接收機之數位信號處理及積體電路設計
論文名稱(外文):DSP Realization and ASIC Design of 3G WCDMA Baseband Receiver
指導教授:陳紹基陳紹基引用關係
指導教授(外文):Sau-Gee Chen
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電子工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:英文
論文頁數:80
中文關鍵詞:寬頻分碼多工存取基頻接收機耙狀接收機通道估測
外文關鍵詞:WCDMAbaseband receiverRake receiverchannel estimation
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本論文主要提出第三代行動通訊(寬頻分碼多工存取)系統中基頻接收機之數位訊號處理器的實現及積體電路架構的設計。在一個寬頻分碼多工存取系統中,基頻接收機主要包含碼同步電路、通道估測器及耙狀接收機。首先,我們針對耙狀接收機、線性內插通道估測與滑動窗型通道估測、碼同步中信號路徑追蹤及搜尋,利用C語言做一個完整的系統模擬。接著,利用Innovative Integration公司的Quatro6x DSP板實現此一基頻接收器,並達到即時(real-time)運算處理。最後,並於論文中提出一個適合以積體電路實現的基頻接收機架構,結合低功率相關器的設計與低複雜度之相關運算演算法分析設計,以達到低功率消耗及高效能設計的基頻接收機。

In this thesis, DSP realization and ASIC architecture design of the baseband receiver of the third Generation Mobile Communication (Wideband Code Division Multiple Access) systems were presented. In WCDMA system, a baseband receiver includes Rake receiver, channel estimator, and code synchronization circuit. First, we simulated and analyzed the whole baseband receiver system in C language for Rake receiver, channel estimation of linear interpolation and sliding window method, and path search and tracking in code synchronization. We implement the WCDMA baseband receiver on Innovative Integration Company’s Quatro6x DSP board. Finally, the WCDMA baseband receiver architecture suitable for ASIC design is proposed. With low-power correlator design and low-complexity correlation algorithms design, the architecture can achieve a low-power consumption and high performance baseband receiver.

Chinese Abstract ………………………………………………… Ⅰ
English Abstract ………………………………………………… Ⅱ
Acknowledgement ………………………………………………… Ⅲ
Contents …………………………………………………………… Ⅳ
List of Tables ………………………………………………… Ⅵ
List of Figures ………………………………………………… Ⅶ
Chapter1 Introduction…………………………………………… 1
1.1 Concept of Direct Sequence CDMA…………………………… 1
1.2 Concept of WCDMA Baseband System ………………………… 3
1.3 Organization of the Thesis ………………………………… 3
Chapter2 WCDMA System Description ………………………… 5
2.1 WCDMA System Overview ……………………………………… 5
2.2 Uplink Physical Channel Structure ……………………… 6
2.3 Code Generation and Allocation …………………………… 9
2.3.1 Channelization Codes …………………………………… 11
2.3.2 Scrambling Codes ………………………………………… 12
2.4 Modulation ……………………………………………………… 16
2.5 System Model …………………………………………………… 17
2.5.1 Channel Model ……………………………………………… 17
2.5.2 Transmitter Model and Receiver Model ………………… 18
Chapter3 Techniques of WCDMA Baseband Receiver………… 21
3.1 Overview of the WCDMA Baseband Receiver ………………… 21
3.2 Code Synchronization ………………………………………… 23
3.2.1 Code Acquisition Algorithm ……………………………… 24
3.2.2 Code Tracking Algorithm …………………………………… 28
3.2.3 Initial Synchronization Scheme in 3GPP ……………… 29
3.3 Channel Estimation …………………………………………… 30
3.3.1 Channel Estimation by Interpolation …………………… 32
3.3.2 Channel Estimation by Sliding Window Filtering …… 34
3.4 Adaptive LMMSE Rake Receiver ……………………………… 37
Chapter4 WCDMA Baseband Receiver Design …………………... 40
4.1 Computation Complexity Analysis …………………………… 40
4.2 WCDMA Baseband System Simulation ………………………… 42
4.3 DSP Realization ……………………………………………… 52
4.3.1 Introduction to DSP Board ………………………………… 52
4.3.2 DSP Implementation and Performance Evaluation ……… 54
4.4 ASIC Design ……………………………………………………… 58
4.4.1 Architecture for WCDMA Baseband Receiver …………… 58
4.4.2 Low Power and Low Complexity Correlator ……………… 60
4.4.3 ASIC Implementation and Performance Evaluation …… 68
4.5 Tradeoff between DSP and ASIC implementation ………… 70
Chapter5 Conclusion and Future Work ………………………… 73
References …………………………………………………………… 75
Autobiography ……………………………………………………… 80

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