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研究生:鄭光偉
研究生(外文):Gwong-Wai Cheng
論文名稱:5.25GHz積體化金氧半正交壓控振盪器
論文名稱(外文):A 5.25GHz Fully Integrated CMOS Quadrature Voltage-Controlled Oscillator
指導教授:周復芳
指導教授(外文):Christina F. Jou
學位類別:碩士
校院名稱:國立交通大學
系所名稱:電信工程系
學門:工程學門
學類:電資工程學類
論文種類:學術論文
論文出版年:2002
畢業學年度:90
語文別:中文
論文頁數:44
中文關鍵詞:壓控振盪器金氧半導體正交
外文關鍵詞:VCOCMOSquadrature
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本論文中提出一個供IEEE802.11a規格之直接降頻接收器使用的5.25GHz 積體化金氧半正交壓控器盪器,此正交壓控振盪器由TSMC 0.25um CMOS製程製造完成,其中振盪腔的可變電容使用實驗室自行設計的accumulaiton mode MOS 壓變電容,其可變電容直範圍較大進一步提供壓控振盪器更寬廣的可調頻率範圍,壓控振盪器架構為PMOS和NMOS雙交偶合對(cross-coupled pair)的型式以提高負電導,並將兩組壓控振盪器交錯相連進而產生出正交訊號。壓控震盪器量測的結果如下:振盪頻率為5.260GHz~5.525GHz,調變頻寬為265MHz,相位雜訊離載波1MHz時為-102.83dBc/Hz,在2.5V電源供應下功率消耗17.5mW。

A 5.25GHz fully integrated CMOS quadrature Voltage-Controlled Oscillator for IEEE 802.11a direct conversion receiver is presented. The quadrature VCO is fabricated by TSMC 0.25um CMOS process using accumulation mode MOS varactor to upgrade tuning range and lower phase noise. The architecture of VCO adopts both NMOS and PMOS cross-coupled pair to enhance negative conductance, and connects two differential LC-tank VCOs to generate four 0,90,180,270 degrees signals The measured result attain a oscillation frequency sweep from 5.260GHz ~ 5.525GHz, tuning range 265MHz, phase noise of -102.83dBc/Hz at 1MHz offset and 17.5mW power consumption at 2.5V DC supply.

Chapter 1 Introduction
1.1 Motivation…………………………………………………………………………1
1.2 Direct Conversion Receiver and quadrature signal generation architecture………2
Chapter 2 High Frequency Characteristic of Varactor
2.1 P-N junction Varactor……………………………………………………….……..6
2.2 Inversion mode MOS Varactor…………………………………………………….6
2.3 Accumulation mode MOS Varactor……………………………………………….7
2.4 Gated Varactor…………………………………………..………………………....8
2.5 Layout………………………………………………………………………….......9
2.6 Measurement Results…………………………………………………………...…9
Chapter 3 Design and analysis of Quadracture VCO
3.1 Differential LC-tank VCO description………………………………...…………19
3.2 Quadrature VCO architecture analysis…………………………………...………20
3.3 Circuit Description……………………………………………………………….21
3.4 Optimizes VCO Phase Noise…………………………………………………….22
3.5 Simulation Results………………………………………………………………..22
3.6 Layout…………………………………………………………………………….22
3.7 Measurement Results………………………………………………………….….23
Chapter 4 Conclusion and Future Prospect
References………………………………………………………………33

[1] IEEE P802.11a/D7.0, July 1999.
[2] P. Kinget, ”A fully integrated 2.7 V 0.35 um CMOS VCO for 5 GHz wireless applications,” ISSCC Digest of Technical Papers, pp.226-227, Feb.1998.
[3] B. Razaviand L. Christoper, “A 2.6 GHz/5.2 GHz CMOS voltage-controlled oscillator,” ISSCC Digest of Technical Papers, pp.402-403, 1999.
[4] Ting-Ping Liu, “ A 6.5 GHz monolithic CMOS voltage-controlled oscillator,”
ISSCC Digest of Technical Papers, pp.404-405, 1999.
[5] Chih-Ming Hung, Brian A. Floyd, and Kenneth K. O, “A Fully Integrated 5.35GHz CMOS VCO and a Prescalar,” IEEE Radio Frequency Integrated Circuits Symposium, pp.69-72, 2000.
[6] Akihiro Yamagishi, Tsuneo Techniques, Mitsuru Harada, and Junichi Kodate, “A Low-Voltage 6-GHz-Band CMOS Monolithic LC-Tank VCO Using a Tuning-Range Switching Technique,” IEEE MTT-S Digest, pp.735-738,2000.
[7] Rategh, H.R. and Samavati, H. and Lee, T.H.”A CMOS frequency synthesizer with an injection-locked frequency divider for a 5-GHz wireless LAN receiver,” IEEE Journal of Solid-State Circuits, Vol. 35, pp. 780-787, May 2000.
[8] Samori, C and; Levantino, S. and Boccuzzi, V. “A -94 dBc/Hz@100 kHz, fully-integrated, 5-GHz, CMOS VCO with 18% tuning range for Bluetooth applications,” IEEE Conference on Custom Integrated Circuits, pp. 201-204, 2001.
[9] B. Razavi, “Design considerations for direct-conversion receivers,” IEEE Trans. Circuits Syst. II, vol. 44, pp. 428—35, June 1997.
[10] M. Tiebout, “Low-power low-phase-noise differentially tuned quadrature VCO design in standard CMOS” IEEE J. Solid-State Circuits, vol. 36, pp.1018-1024, July 2001
[11] P. Andreani and S. Mattisson, “On the use of MOS varactors in RF VCO’s,” IEEE J. Solid-State Circuit, vol. 35, June 2000.
[12] Wong, W.M.Y.; Ping Shing Hui; Zhiheng Chen; Keqiang Shen; Lau, J.; Chan, P.C.H.; Ping-Keung Ko “A wide tuning range gated varactor,” IEEE Journal of Solid-State Circuits, , Vol.35, pp.773-779, May 2000.
[13] Porret, A.-S.; Melly, T.; Enz, C.C.; Vittoz, E.A. “Design of high-Q varactors for low-power wireless applications using a stand CMOS process,” IEEE Journal of Solid-State Circuits, Vol.35, pp.337-345, March 2000.
[14] Soorapanth, T.; Yue, C.P.; Shaeffer, D.K.; Lee, T.I.; Wong, S.S. “Analysis and optimization of accumulation-mode varactor for RF ICs” Symposium on VLSI Circuit Digest of Technical Papers. pp.32-33, 1998.
[15] Behzad Razavi, “RF Microelectronics” Prentice Hall PTR, 1998.
[16] A. Hajimiri and T. H. Lee, “The Design of low noise oscillators,” Kluwer Academic Publishers, 1999.
[17] Guillermo Gonzales, “Microwave Transistor Amplifier Analysis and Design,” Prentice-Hall, 1997
[18] M. Rofougaran, A. Rofougaran, J. Rael, and A. A. Abidi, “A 900-MHz CMOS LC-oscillator with quadrature outputs,” in Proc. IEEE Int. Solid-State Circuits Conf., New York, NY, 1996, p. 392.
[19] Hajimiri, A.; Lee, T.H. ”Design issues in CMOS differential LC oscillators ,”
IEEE Journal of Solid-State Circuits, Vol.34 , pp.717-724, May 1999.
[20] Ham, D.; Hajimiri, A. ”Concepts and methods in optimization of integrated LC VCOs,” IEEE Journal of Solid-State Circuits, Vol. 36, pp896-909 , June 2001.

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